SW QA Engineer – Radiant Software

Lattice Semiconductor; Malaysia; On-site; MYR 60,000 - 90,000; Full time

Job summary

Lattice Semiconductor is seeking a SW QA Test Engineer based in Malaysia to validate the Lattice Radiant software. The ideal candidate will have hands-on experience with FPGA software development and Verilog/VHDL.

The position involves developing test plans, validating software usability, and collaborating closely with engineering teams. Strong scripting skills and knowledge of FPGA design flows are essential.

Qualifications

• Experience in FPGA software development, application engineering, or field application engineering is required.
• Hands-on experience with automation scripting in Python, Tcl, and Shell.
• Knowledge of FPGA power estimation tools and version control systems.

Responsibilities

• Develop and execute test plans for Lattice Radiant software.
• Validate software accuracy and usability across device families.
• Collaborate with teams to resolve defects and track test results.

Skills

FPGA background from software development

Hands-on Verilog/VHDL experience

Scripting proficiency in Python

Familiarity with FPGA design flows

Tools

Lattice Radiant

Intel Quartus Prime

AMD Vivado Design Suite

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

We are seeking a SW QA Test Engineer with an FPGA background to validate Lattice Radiant software. The ideal candidate brings hands‑on Verilog/VHDL experience from FPGA software development, application engineering (AE), or field application engineering (FAE). Prior software QA experience is a plus, not a requirement.

Key Responsibilities:

• Develop and execute test plans for Lattice Radiant software features, with an initial focus on the Power Calculator (PWC), based on functional specifications and user behavior documents (UBD).
• Apply FPGA domain knowledge to create realistic, customer‑representative test scenarios using Verilog/VHDL design inputs.
• Validate software accuracy and usability across supported device families.
• Reproduce and triage customer‑reported issues using AE/FAE‑style understanding of real‑world FPGA design workflows.
• Build and maintain automation scripts (Python, Tcl, Shell) for regression testing in both GUI and command‑line (Bash/TCL) modes.
• Track and report test results, defect status, and feature coverage metrics via dashboards and Jira.
• Collaborate with software development, documentation, and applications teams to reproduce, triage, and resolve defects.
• Participate in design reviews and UBD walkthroughs to provide early QA input on testability and requirements.

Required Technical Skills:

• FPGA background from software development, application engineering (AE), or field application engineering (FAE).
• Hands‑on Verilog/VHDL experience; ability to create representative HDL designs for software validation.
• Familiarity with FPGA design flows: synthesis, place‑and‑route, timing closure, and bitstream generation.
• Experience with at least one FPGA tool suite: Lattice Radiant, Intel Quartus Prime, or AMD Vivado Design Suite.
• Scripting proficiency in Python, Tcl, and/or Shell for test automation.
• Ability to read and interpret FPGA tool reports: timing, utilization, and power.

Preferred Skills:

• Added Advantage: Hands‑on experience with an FPGA power estimation tool — particularly the Lattice Power Calculator (Radiant PWC) — is a strong added advantage and will be given significant weight during candidate evaluation.
• Knowledge of FPGA power estimation tools: Lattice Power Calculator (PWC), Intel Power Analyzer, or AMD XPE.
• Experience with Lattice Radiant software and Lattice FPGA device families.
• Prior software QA, test engineering, or application validation experience.
• Familiarity with power analysis concepts: static/dynamic power, toggle rates, SAIF/VCD activity.
• Familiarity with version control (Git, Perforce) and issue tracking (Jira).
• Exposure to CI/CD pipelines and automated regression frameworks.

Soft Skills:

• Customer‑centric mindset: able to anticipate real‑world usability and accuracy issues in EDA software.
• Clear written and verbal communication; writes concise test plans and structured defect reports.
• Collaborative team player with a detail‑oriented, systematic approach to quality gaps.