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A leading technology company in Penang, Malaysia is seeking a Staff Design For Test Engineer. The role involves developing logic design and RTL coding, ensuring verification of design features, and collaborating with teams for high-quality integration. Candidates should have a relevant degree, skills in DFT design, and proficiency in scripting languages. This position offers full-time employment with opportunities for career growth.
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Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN).
Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST).
Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE).
Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT.
Optimizes logic to qualify the design to meet power, performance, area, timing, test-coverage, DPM, and test-time/vector-memory reduction goals as well as design integrity for physical implementation.
Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications.
Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure high-quality integration of the IP block.
Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation.
Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor or Master in Electrical/Electronics/Computer Engineering or related field.
Good understanding of the ASIC design flow as well as the DFT and Manufacturing requirements
Skilled in DFT design and Integration, various validation techniques and industry standard methodologies - IJTAG, MBIST, LBIST, SCAN, etc.
Proficiency in scripting languages such as TCL/TK/PERL/Python.
Preferred Qualifications:
In depth understanding of the latest DFT industry best technology, tools and methodology, and have experienced to innovatively adapt those technology to specific product needs.