Memory Design Engineer (Schematic & Characterization)

X-FAB Sarawak; Kuching; On-site; MYR 80,000 - 110,000; Full time

Job summary

A leading semiconductor company in Kuching, Malaysia, seeks a Memory Design Engineer to develop high-quality SRAM and ROM. The ideal candidate will have a Master’s degree and over five years of experience in memory design and characterization. Responsibilities include architecture definition, verification of circuit blocks, and maintaining compliance with ISO26262. Proficiency in EDA tools and simulation tools like SPICE is essential. Join us to contribute to cutting-edge technology in a collaborative, multi-national team.

Qualifications

• Minimum 5 years of experience in memory design and characterization.
• Exposure to the complete design cycle of memory development.
• Strong backgrounds in digital and analog circuit design.

Responsibilities

• Define architecture and schematic design of RAM and ROM compilers.
• Verify leaf cells and circuit blocks; analyze circuit behavior and timing.
• Develop memory characterization flows and mitigate risks through analysis.

Skills

Communication skills

Teamwork and collaboration

Self-motivated and results-oriented

Experience with EDA tools

Programming languages (Perl, Python, Tcl)

Education

Master or higher in Electronics Engineering

Tools

SPICE simulation tools

Schematic editors

Job description

Overview

Kuching, Malaysia

Job Summary

We are looking for a Memory Design Engineer to contribute to a highly innovative team by designing and developing high quality SRAM and ROM. You will work with other team members on the new process design challenges. You will have the chance to create novel low power and high-performance circuits and develop in-house design and verification flows for SRAM and ROM design in the context of ISO26262.

Major Responsibilities

• Architecture definition and schematic design of RAM and ROM compilers to get the most optimal circuit in terms of power and performance.
• Verification of leafcells/circuit blocks including analysis of circuit behavior, timing marginalities, correct description of timing characterization intent on both pre and post layout netlist across the entire PVT space and compiler cut space.
• Implement memory characterization flows based on NLDM/NLPM and CCS characterization.
• Mitigate risks through proactive design analysis.
• Generate front-end views (LIB) for memory IP integration in System-on-Chip.
• Documentation and design review organization for compliant development in the context of ISO26262.
• Development QA flow for design verification.
• Any other assignment and role deemed appropriate might be assigned to you from time to time.

Position Requirements

• Qualification: Master or higher in Electronics Engineering.
• Minimum 5 years of working experience in memory design and memory characterization. Exposure to complete design cycle of memory development.
• Skills/Competencies:

Behavioral Competencies

• Good communication skills – good level in English, written and spoken.
• Teamwork and collaboration skills, working within multi-national, multi-site team.
• Open, curious in new design implementation, integrity and friendly when engaging internal/external customers.
• Self-motivated, progressive attitude, and able to work independently with minimum supervision.
• Excellent writing and reporting skills with strong communication and analytical skills.
• Able to learn quickly, self-driven and results-oriented.

Technical/Functional Competencies

• Experience in using EDA tools for schematic entry and advanced transistor level simulators. Proven experience on transistor-level circuit design and circuit behavior analysis.
• Solid understanding of device physics and process.
• Knowledge of industry standard circuit simulation and design tools.
• Deep background of the design, verification, and characterization of memory.
• Solid understanding on generating performance/power/margin data of memory, validation of data and QA process.
• Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools.
• Experience in programming languages such as Perl, Python, Tcl, and automation methods/algorithms is an advantage.
• In-depth understanding of circuit fundamentals with a good exposure to digital and analog circuit design is a must. Strong experience in Memory design and characterization and associated EDA tools (Schematic editor, Spice Simulators, Characterization Infrastructure etc.).

Contact person: Kristina Sim