IC Package Layout Design

Mnosys Sdn Bhd; Bayan Lepas; On-site; MYR 70,000 - 100,000; Full time

Job summary

Jora Malaysia is seeking a wafer packaging design engineer to lead feasibility studies for WLCSP, WLBGA, eWLB, wirebond and flipchip packages with OSAT and substrate suppliers. You will perform laminate substrate physical layout and electrical analysis to ensure design tape-out success.

Responsibilities include updating design rules and DFMEA, drafting substrate unit drawings, strip drawings, bond master and bonding diagrams, and supporting submissions in the system.

Responsibilities

• Feasibility study and design review for WLCSP/ WLBGA, eWLB package, Wirebond package & Flipchip with OSAT & substrate suppliers
• Laminate substrate physical layout and electrical analysis to ensure successful design tape-out
• Update design rules and DFMEA
• Draft substrate unit drawings, strip drawings, bond master & bonding diagrams, and manage submissions in the system
• Participate in 2nd source supplier qualification activities

Job description

Jora Malaysia will close on 16th September 2026. Thank you for being with us, we are cheering you on as you continue your career journey.

• Responsible for WLCSP/ WLBGA, eWLB package, Wirebond package & Flipchip package feasibility study, design & design review with OSAT & substrate suppliers.
• Perform laminate substrate physical layout and electrical analysis for success design tape out.
• Perform design rules and DFMEA update.
• Support drafting activities for substrate unit drawing, strip drawing, bond master & bonding diagram creation, update and submission in system.
• Participate in 2nd source supplier qualification activities.