Graduate CPU Design Verification Engineer

Intel

George Town

On-site

MYR 78,000 - 123,000

Full time

17 hours ago
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Job summary

Intel in Malaysia, Penang, is seeking a Graduate Talent for CPU Design Verification to join the validation team. You will perform functional validation across simulation, emulation, FPGA or real platforms on next-generation CPU designs, collaborating with architecture and design teams.

This contract-based role requires a Bachelor in E&E or Computer Engineering and offers exposure to DFx features, test development, and debugging across DFx architectures, RTL bugs, and pre/post-silicon

Qualifications

  • Bachelor degree in Electrical/Electronics Engineering or Computer Engineering.
  • Knowledge of computer system architecture and digital logic design.
  • Experience with verification/pre-silicon methods and SystemVerilog, Python/Perl/C/C++, Synopsys simulators.
  • Strong analytical and debugging skills; creative in problem solving.

Responsibilities

  • Validate and verify DFx features of next generation CPU.
  • Know in-depth the DFx architectures to develop test plans.
  • Develop new test content and/or test tools as needed.
  • Identify RTL bugs and debug failures across simulation/emulation/FPGA to root cause.
  • Develop software solutions based on CPU DFx for post-silicon usages and provide tool support.

Skills

DFx knowledge
SystemVerilog
Python/Perl/C/C++
Synopsys simulator
Debugging skills

Education

Bachelor's degree in Electrical/Electronics Engineering or Computer Engineering

Tools

Synopsys simulator

Job description

Intel in Malaysia, Penang, is seeking a Graduate Talent for CPU Design Verification to join the validation team. You will perform functional validation across simulation, emulation, FPGA or real platforms on next-generation CPU designs, collaborating with architecture and design teams.

This contract-based role requires a Bachelor in E&E or Computer Engineering and offers exposure to DFx features, test development, and debugging across DFx architectures, RTL bugs, and pre/post-silicon

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