System IP uArchitect (Staff/Senior Staff Engineer)

BuildxPartners; Bengaluru; On-site; INR 2,000,000 - 3,000,000; Full time

Job summary

BuildxPartners is searching for a System IP uArchitect (Staff/Senior Staff Engineer) based in Bengaluru, India. The role involves working on the architecture and micro-architecture of next-generation SoC infrastructure IPs, with responsibilities that include high-level design and analysis across various technologies.

The ideal candidate will have over 8 years of experience in IP architecture, strong skills in SoC and ARM architectures, and proficiency in Verilog and various design protocols.

Qualifications

• 8+ years of experience in IP architecture or hardware design.
• Strong understanding of SoC architecture and protocols.
• Good communication skills and ability to work independently.

Responsibilities

• Develop high-level architectures and prototypes for IPs.
• Analyze power, area, latency, and architectural trade-offs.
• Collaborate across teams for successful IP implementation.

Skills

IP architecture

micro-architecture design

hardware design

Verilog

ARM architecture

Education

Bachelor's degree in Electrical Engineering or related field

Tools

UVM

AHB

AXI

Job description

Bangalore North, India | Posted on 25/06/2026

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Job Description

About Our Client

Our client is a global semiconductor company developing next-generation SoCs for smartphones, AI accelerators, compute platforms, and other advanced technologies.

Job Description

We are looking for a System IP uArchitect (Staff/Senior Staff Engineer) to work on the architecture and micro-architecture of next-generation SoC infrastructure IPs.

Key Responsibilities

• High-level architecture and micro-architecture development.
• Build design prototypes for advanced IPs and validate proof-of-concept algorithms.
• Perform early analysis on power, area, latency, and architectural trade-offs.
• Work across SoC infrastructure including high-speed interconnects, bus protocols, memory technologies, and power architecture.
• Collaborate with Performance Modeling teams to prototype new IP ideas and with Silicon teams to analyze previous products and competitive solutions.
• Guide Design, Verification, and Engineering teams for successful IP implementation and commercialization.
• Work with Software teams on post-silicon tuning for performance and power optimization.

Preferred Qualifications

• 8+ years of experience in IP architecture, micro-architecture, or hardware design.
• Strong understanding of SoC architecture.
• Expertise in one or more of the following: DDR, Interconnects, SoC Power Management, Clock/Reset, Compression, Encryption, or ECC.
• Good understanding of ARM architecture , including coherency, security, bus interconnects, and architecture evolution.
• Experience with Verilog and digital logic design, including timing, area, and power implications.
• Knowledge of AHB, AXI, ACE, ACE-Lite, and CHI protocols.
• Good understanding of concurrency, bandwidth, latency, and system-level architecture.
• Experience with UVM and test plan development is an added advantage.
• Good communication skills with the ability to work independently and collaborate across teams.

Education

Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related field is required. Master's or PhD is preferred.