Staff Analog layout Engineer

ON Semiconductor; Bengaluru; On-site; INR 2,400,000 - 4,200,000; Full time

Job summary

ON Semiconductor in Bengaluru is seeking a Staff Analog layout Engineer for New Product Development in Power Management. You will contribute to layout of AMS IP blocks and collaborate with chip, tech and CAD teams to tape out high-performance devices.

The role requires BE in Electrical Engineering or MS with 6–7+ years in analog/mixed-signal layout, plus proficiency with Cadence/Calibre tools and Unix. Strong communication and teamwork are essential.

Qualifications

• Experience delivering high quality analog layout IPs.
• Good understanding of layout fundamentals and best practices.
• Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports.
• Programming knowledge in SKILL, Perl, and/or Python is a bonus.
• Experience with CADENCE or MENTOR GRAPHICS layout tools.
• Solid understanding of semiconductor manufacturing process and DFM techniques.
• Proficient at debugging/fixing LVS/DRC errors.
• Must be familiar with Cadence Design Environment (CDE) and Unix OS.
• Must have strong communication skills and be a team player.

Responsibilities

• Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc).
• Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS, ESD, etc.), as well power analysis (EM / IR-Drop).
• Contribute and support team in taping out high-performance microcontroller chip.
• Actively seek out opportunities to work with cross-functional teams (Chip team, Tech, CAD).
• Develop scripts and methods for layout design automation.

Skills

Analog/mixed-signal layout experience

Strong communication

Team player

Education

BE in Electrical Engineering

MS in Electrical Engineering

Tools

Cadence

Mentor Graphics

Calibre DRC/ERC/LVS

SKILL

Python

Perl

Unix

Job description

OnSemi is seeking a Staff Analog layout Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and e-fuses for consumer, industrial and automotive applications. In this role, you will focus on the following.

#LI-MK1

BE in Electrical Engineering or related + 7 years of experience, or MS +6 years of experience preferred with experience in analog/mixed-signal layout design of deep submicron CMOS and BCD technologies

Qualification

• Experience in delivering high quality analog layout IPs
• Good understanding of layout fundamentals and best practices
• Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports
• Programming knowledge in SKILL, Perl, and/or Python is a bonus
• Experience with CADENCE or MENTOR GRAPHICS layout tools
• Solid understanding of semiconductor manufacturing process and DFM techniques
• Proficient at debugging/fixing LVS/DRC errors
• Must be familiar with Cadence Design Environment (CDE) and Unix OS
• Must have strong communication skills and be a team player

#LI-MK1

Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc)

• Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS, ESD, etc.), as well power analysis (EM / IR-Drop)
• Contribute and support team in taping out high-performance microcontroller chip
• Actively seek out opportunities to work with cross-functional teams (Chip team, Tech, CAD)
• Develop scripts and methods for layout design automation

#LI-MK1

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