Sr Validation Engineer

jobr.pro; Bengaluru; On-site; INR 3,800,000 - 6,200,000; Full time

Job summary

Renesas Electronics in Bengaluru is seeking a Senior Engineer Validation with 7+ years of bench validation and debug experience for PMICs. You will own bench validation, silicon debugging, and automation of equipment/tests, collaborating with Design & Systems teams to ensure high‑quality ICs.

The role also involves leading a small team, defining lab setup from scratch, and developing automated tests in Python/C/LabVIEW to reduce bench costs while ensuring quality through standardization and

Qualifications

• Bachelor’s or master’s degree in electrical engineering.
• 5+ years of hands‑on experience in Bench Validation of Mixed Signal ICs, especially PMICs.
• Ability to work with clarity and predictable timelines to ensure deliverables with high quality.
• Cross cultural awareness and sensitivity.
• Results‑oriented and able to deliver on‑time under tight schedule pressure.

Responsibilities

• Maximise utilisation of benches, equipment and resources through automation and industry best practices.
• Write bench test programs in Python, C, LabVIEW and debug ATE programs.
• Coach/mentor/ramp up new graduates and freshers.
• Plan bench test program development, testing and debug timelines and identify risks.
• Ensure accuracy, quality and presentation of waveforms, reports and documentation.
• Lead bench validation and debug of PMICs from Bengaluru while coordinating with remote teams.
• Utilize validation equipment including power supplies, load, scopes, probes, multi-meters, relays and PCB lab tools.
• Define and drive bench validation plans for PMICs and evaluation boards.
• Work with FPGAs for testing digital behavior and system emulation.
• Drive ATE-bench correlation and related activities.
• Familiarity with PMIC communication protocols (SPMI, PMBUS, SVI3, SVID, I2C).
• Create basic circuits on breadboards for experimentation and PCB design.

Skills

Python

C

LabVIEW

Automation

Bench Validation

Mentoring

Team leadership

Education

Bachelor’s or Master’s degree in electrical engineering

Tools

ATE programs

Oscilloscopes

Power supplies

Job description

Job Description

Senior Engineer Validation position is an IC role which requires 7+ years of experience of Bench Validation and Debug of Power Management ICs as part of 2.6B$ Power Business Unit at Renesas. Primary responsibilities include fully own Bench Validation, Silicon Debugs, Automation of Equipment and Tests of PMICs. Will also be responsible for analysing the data, documenting and reporting findings to the Systems team and work closely with Design & Systems experts to ensure quality ICs. The role also involves opportunity to technically lead a small team with ownership of doing end to end IC validation.

The candidate should be able to develop and automate industry standard tests which are done for switching converters. In addition, the candidate should be able to define the equipment requirements for testing Power Management ICs and help setup lab from scratch. Ability to debug setups, equipment related issues and identify solutions is a must. The candidate needs to minimize Bench Testing cost while ensuring high quality in testing by employing standardization, reuse and automation.

Responsibilities

• Maximise utilisation of Benches, equipment and resources through automation and industry best practices.
• Write bench test programs in Python, C, Labview and be able to debug ATE programs. Work with a mindset of smart work, collaboration with rest of the team.
• In this technical role, candidate must be very strong hands on and should also be able to technically coach/mentor/ramp up new college graduates and freshers.
• Project the schedule for bench test program development, testing and debug based on the infrastructure and resource availability and identify gaps/risks for execution.
• Ownership and Accountability for accuracy, quality and presentation of all deliverables (waveforms, reports, documentation, results etc).
• Technically lead bench validation and debug of multiple PMICs out of Bengaluru, while working with design/systems teams which located at different geographies and in different time zones.
• Expertise of using Validation related equipment including various types of Power Supplies, Load Slammer, Scopes and probes, Multi-meters, Analog switches, Relays, Computer to IC board communications etc.
• Must have experience of defining and driving Bench Validation plan for Power Management ICs and Evaluation Boards.
• Must be fluent with using FPGAs for testing Digital and emulating system behaviour.
• Must have experience with ATE-Bench correlation and should be able to drive that independently.
• Should be well versed with one or more Power Chip Communication protocols e.g. SPMI, PMBUS, SVI3, SVID etc. Should be comfortable with I2C.
• Should be able to create basic circuits on bread board for experimentation and design PCBs.

Qualifications

• Bachelor’s or master’s degree in electrical engineering
• 5+ years of hands‑on experience in Bench Validation of Mixed Signal ICs, especially PMICs.
• Ability to work with clarity and predictable timelines to ensure deliverables with high quality.
• Cross cultural awareness and sensitivity.
• Results‑oriented and able to deliver on‑time under tight schedule pressure.

Equal Opportunity and Diversity

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.