SoC Logic Design Engineer

Intel Corporation; Bengaluru; Hybrid; INR 1,400,000 - 2,100,000; Full time

Job summary

Intel Corporation in Bengaluru seeks an experienced SoC Logic Design Engineer to develop RTL and integrate logic blocks into complex SoCs. You will conduct simulations and quality checks to ensure designs meet power, performance, timing, and area targets.

You will collaborate with IP providers to validate IPs at the SoC level and review verification plans to drive corrective actions for failing RTL tests. The role emphasizes design optimization and cross-functional teamwork.

Qualifications

• Bachelor's degree with 3+ years of relevant experience OR Master's degree with 2+ years OR PhD with no prior professional experience.
• Experience with timing/power convergence tools and methodologies.
• Knowledge of design closure techniques for 10nm or lower.
• Exposure to synthesizable Verilog/SystemVerilog and simulation tools.

Responsibilities

• Develop RTL designs and integrate logic components into SoC architectures.
• Perform simulations and quality assurance checks for power, performance, area, and timing targets.
• Collaborate with IP providers to integrate and validate IPs at the SoC level.
• Review verification plans and implement corrective actions for failing RTL tests.
• Optimize logic designs using advanced strategies and tools.

Skills

Analytical skills

Communication skills

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Master's degree in Electrical/Computer Engineering or related field

PhD in related field

Tools

Verilog/SystemVerilog

Simulation tools

Job description

Job Details:

Job Description:

The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in developing and integrating logic designs into complex System-on-Chip (SoC) architectures. Your day-to-day efforts will focus on RTL coding, simulation, and quality checks to ensure designs meet power, performance, timing, and area targets. You will collaborate cross-functionally to validate design features and drive corrective actions, ensuring the highest standards of performance and reliability for Intel's cutting-edge technologies.

Business groupYou will be part of Intel's Technology Development Group. As part of this team you will work on Foudnational IP TestChip designs that drive innovation and support Intel's broader mission to shape the future of technology. This group focuses on the development of advanced methodologies, tools, and design solutions for next-generation products, fostering collaboration and excellence across diverse technical domains.

Key Responsibilities

• - Develop RTL designs and integrate logic components into SoC architectures.
• - Perform simulations and quality assurance checks to ensure design reliability and compliance with power, performance, area, and timing goals.
• - Collaborate with IP providers to integrate and validate IPs at the SoC level.
• - Review verification plans to ensure design features are thoroughly tested and implement corrective actions for failing RTL tests.
• - Optimize logic designs using advanced strategies, tools, and methods.

Qualifications

• Minimum Qualifications- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of relevant experience OR Master's degree with 2+ years of experience OR PhD with no prior professional experience.
• Preferred Qualifications- Experience with timing/power convergence tools and methodologies.
• Preferred Qualifications- Knowledge of design closure techniques for advanced technology nodes (e.g., 10nm or lower).
• Preferred Qualifications- Exposure to synthesizable Verilog/System Verilog and simulation tools.
• Preferred Qualifications- Strong analytical and problem-solving skills, coupled with clear and proactive communication.

We invite you to bring your skills, curiosity, and passion for innovation to Intel and join a collaborative environment where your contributions will drive meaningful advancements in technology.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.