SOC Engineering, Architect

Synopsys Inc; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Benefits offered by this job

Health benefits

Salary discussions during hiring

Job summary

Synopsys is seeking an experienced IP Subsystems Architect to define and drive architecture for complex subsystems in cutting‑edge silicon. You will translate system requirements into scalable subsystems, integrate multiple IP blocks, and lead collaboration across hardware, software, verification, and physical design teams.

You will guide verification strategies, document architectural intent, and mentor engineers to deliver high‑quality silicon with optimized performance, power, and

Qualifications

• 15+ years in electronics/semiconductor design, IP integration, or SoC architecture.
• Strong expertise in Verilog/SystemVerilog and advanced verification methodologies.
• Proficiency with interface protocols (AMBA, DDR, PCIe, Ethernet, USB, UFS).
• Excellent cross‑team communication, documentation, and leadership in complex projects.

Responsibilities

• Define architectural specifications for complex subsystems (memory controllers, compute blocks, interconnects).
• Translate system requirements into detailed subsystem architectures optimizing performance, bandwidth, latency, power, and reliability.
• Integrate multiple IP blocks into cohesive subsystems with seamless interoperability and SoC constraints.
• Lead cross-functional collaboration with hardware, software, verification, and physical design teams.
• Establish and guide verification/validation strategies, including coverage and silicon bring-up.
• Produce architecture documents, specifications, and guidelines and communicate intent to stakeholders.
• Mentor engineers and foster technical excellence across teams.

Skills

Leadership

Cross-functional collaboration

System-level thinking

Architectural design

Education

Bachelor’s or Master’s degree in Electronics

Tools

Verilog

SystemVerilog

SV UVM

AMBA AXI/CHI/APB

DDR

PCIe

Ethernet

USB

UFS

Synthesis

Lint

CDC

Low-power flows

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

IP Subsystems Architect

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced and visionary ASIC digital design architect who thrives in a fast-paced, collaborative environment. You bring a passion for solving complex system-level challenges and a track record of delivering innovative, high-quality silicon solutions. Your deep understanding of IP and SoC architectures enables you to see the big picture while meticulously refining subsystem details. You are comfortable navigating ambiguity, building consensus across diverse teams, and translating product requirements into robust, scalable architectures. Your leadership inspires those around you, and you excel at mentoring and empowering engineers to reach their full potential. You are adept at balancing trade-offs across performance, power, area, and security, always striving for the optimal solution. Communication is your strength—you articulate technical concepts clearly to both technical and non-technical stakeholders, ensuring alignment and shared understanding. With a growth mindset, you embrace new challenges, technologies, and methodologies, continuously seeking opportunities to innovate and improve. You value inclusion and diversity, recognizing that the best ideas emerge from a culture where everyone feels empowered to contribute. You are eager to make an impact at a global leader like Synopsys, helping to accelerate the Era of Smart Everything and shaping the future of technology.

What You’ll Be Doing:

• Defining architectural specifications for complex subsystems (e.g., memory controllers, compute blocks, interconnect clusters, power management units, or communication subsystems).
• Translating system-level requirements into detailed subsystem architectures, optimizing for performance, bandwidth, latency, power, and reliability.
• Integrating multiple IP blocks into cohesive subsystems, ensuring seamless interoperability, dataflow alignment, and compliance with SoC-level constraints.
• Leading cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.
• Establishing and guiding verification and validation strategies, including defining coverage requirements and participating in silicon bring-up and debug sessions.
• Producing comprehensive architecture documents, specifications, and guidelines, and clearly communicating architectural intent to a wide range of stakeholders.
• Mentoring and coaching engineers, driving best practices, and fostering a culture of technical excellence.

The Impact You Will Have:

• Shape the architecture of industry-leading silicon IP and subsystem solutions that power millions of devices worldwide.
• Accelerate time-to-market for differentiated products by ensuring robust and efficient subsystem design and integration.
• Reduce risk through rigorous requirements management, architectural clarity, and cross-functional alignment.
• Enhance product performance, power efficiency, and reliability, directly impacting customer satisfaction and competitive advantage.
• Foster innovation by mentoring teams, introducing new methodologies, and championing best practices.
• Strengthen Synopsys’ position as a trusted technology leader in the semiconductor ecosystem.

What You’ll Need:

• Bachelor’s or Master’s degree in Electronics or a related field, with 15+ years of industry experience.
• At least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture roles.
• Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (e.g., SV UVM, BFM development).
• Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.).
• Experience with synthesis, lint, CDC, low-power flows, and achieving verification closure.
• Strong documentation and communication skills for effective cross-team alignment and requirements management.

Who You Are:

• A strategic thinker with exceptional leadership and mentoring capabilities.
• A collaborative partner who thrives in diverse, cross-functional teams.
• An excellent communicator, able to tailor messaging for both technical and non-technical audiences.
• Innovative and proactive, always seeking opportunities to improve processes and outcomes.
• Resilient and adaptable, comfortable with change and ambiguity.
• Committed to fostering an inclusive and empowering team culture.

The Team You'll Be Part Of

• Your recruiter will share more about the team structure and mission during the interview process.

Rewards And Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.