Silicon Validation Engineer AI/ML, Google Cloud

Google Inc.; Bengaluru; On-site; INR 2,500,000 - 3,800,000; Full time

Job summary

Google Bengaluru is seeking an early-career hardware IP engineer to study ML IP instruction sets, build models, and collaborate with pre- and post-silicon teams for validation. You will apply strong C++ skills and RTL concepts to drive efficient hardware designs.

Ideal candidates bring a background in EE/CE/CS, 2 years of IP modeling experience, and familiarity with Verilog, enabling contributions across architecture, verification, and software alignment in a fast-moving environment at Google.

Qualifications

• Bachelor's degree in EE/CE/CS or related field; equivalent experience accepted.
• 2 years of experience in developing simulation models for hardware IPs or PhD.
• Experience in developing software systems in modern C++.

Responsibilities

• Study the instruction set and architecture of ML IPs and discuss delta features from the previous generation.
• Develop functional or performance models for ML IPs and integrate with the Cloud TPU SoC model.
• Work with pre-silicon verification and post-silicon validation teams to deploy the models in their validation flows.
• Collaborate with compiler and software teams to enable left-shift of development activity.

Skills

C++

Simulation models

Team collaboration

Education

Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science

Tools

Verilog

Job description

Early

Experience completing work as directed, and collaborating with teammates; developing knowledge of relevant concepts and processes.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 2 years of experience in developing simulation models for hardware IPs, or a PhD.
• Experience in developing software systems in modern C++.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in applying computer architecture principles to solve open-ended problems.
• Experience in hardware and software co-design.
• Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog.
• Knowledge of processor design or accelerator designs and mapping ML models to hardware architectures.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Study the instruction set and architecture of the Machine Learning (ML) IPs and drive discussions on the delta features from the previous generation.
• Develop functional or performance models for the ML IPs. Integrate the functional models with the Cloud TPU SoC model and deliver the single source of truth architectural reference.
• Work with pre-silicon verification and post-silicon validation teams to deploy the models into their validation flows.
• Work with compiler and software teams to enable them to left-shift their development activity.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.