Senior SoC Director

Mulya Technologies; Hyderabad; On-site; INR 5,000,000 - 7,000,000; Full time

Job summary

Omni Design Technologies, Inc. is seeking a Senior SoC Director / Senior Principal Engineer to lead the digital and mixed-signal engineering team. The role collaborates with Analog/RF, FW, verification, and systems validation to deliver next-generation mixed-signal SOCs for automotive and space applications.

The candidate will drive architectural definitions, oversee design, verification, and ensure seamless hand-off to backend, while mentoring a high-performance engineering staff.

Qualifications

• Bachelor of Science in Electrical/Electronics or related field. Master preferred.
• Proven track record in RTL design and verification of silicon.
• Experience leading/motivating a team of engineers.

Responsibilities

• Manage digital team, hire and retain top talent.
• Lead SOC integration design for next-gen mixed-signal RF/communication SOCs.
• Define product specs, system architecture, HW/SW partitioning, and execution plan.
• Improve design methodology to maximize efficiency and predictability.
• Deliver chip architecture, design, verification, and hand-off to backend.
• Support validation, production testing, and system integration.

Skills

RTL design

SoC architecture

Verilog/SystemVerilog

UVM

C/C++/SystemC

Leadership

Education

BSEE

MSEE

Tools

Cadence tools

Synopsys tools

FPGA experience

Job description

Senior SoC Director / Senior Principal Engineer

About Omni Design Technologies

Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts.

Full-time /

Hybrid

Omni Design is working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers.

The Director of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog/RF engineering, FW engineering, verification, Systems Validation team, Operations, SOC Architects, and report to the VP / SVP of ASIC Engineering.

Nice to have experience in

UCIE

PCIE Gen5/Gen6/Gen7

Roles and Responsibilities

• Manage digital team, hire, and retain best talent
• Lead SOC integration design team to develop and productize next generation mixed-signal RF/communication SOCs
• Work with cross-functional project teams to define product specifications, system architecture, HW/SW partitioning, and execution plan
• Implement best SoC development practices and improve design methodology to maximize efficiency and predictability
• Deliver chip architecture, design, integration, programming model, verification, and manage hand-off to backend
• Support Silicon and System Validation, support system integration, and production testing
• Drive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution

Qualifications

• BSEE Required, MSEE Preferred
• Proven track record of success in high-performance/high-volume semiconductor industry
• SoC, embedded CPU and bus architectures, networking, and control interfaces
• Communications / DSP algorithms and power / area efficient implementations
• Digital IC design, design for low power and high speed, design for test (DFT)
• System modeling, RTL coding, Lint / CDC checking, simulation, synthesis, power analysis, timing analysis in Cadence / Synopsys design environments
• Directed and constrained random verification, UVM methodology
• Embedded systems FPGA emulation, lab debug and chip validation
• Project planning and execution, and performing design tradeoffs to achieve performance, power die size, and schedule targets
• Self-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment
• Work with architecture, physical design, and design teams to lead the implementation of the digital architecture.
• Develop and refine specification of the micro-architecture for the digital architecture.
• Is in tune with industry trends and contributes to consistent roadmap decisions.

Experience

• 20-30+ years of experience in the area of RTL design and verification of silicon
• At Least 3+ years experience in leading low-power mixed-Signal SOC design
• 10+ years of experience with FPGA architecture specification and design (Altera or Xilinx) for high-speed serial protocols, including USB-SS, PCIe, SATA/SAS, DisplayPort
• Experience in leading, specifying, and work with Analog/RF team in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs
• Experience with USB 3.0, DisplayPort, PCIe, or SATA based silicon designs preferred
• Strong background in analog/mixed-signal integrated SOC Development
• Strong Hardware design knowledge and familiarity with signal integrity
• Strong foundation in SoC architecture, design, verification and physical implementation
• Strong analytical problem solving, and attention to details
• Knowledge of wireless, mobile, and storage domains
• Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.
• Excellent technical documentation skills
• Excellent written and verbal communication skills
• Excellent interpersonal skills, self-motivated, self-starter
• Experience in startup environment
• Put the RTL for the Full chip together.
• Evaluate the IP we have to license - like PCIe, LPDDR4, JESD 204C PHY
• Help develop any BIST
• Work with Verification Team to develop the FC Simulation test suites
• Develop the RTL for the various state machines and interfaces
• Run a few of the simulations
• Help with the FC simulations debug
• Help close the timing issues if any come up and work with the PD person to resolve any SI issues.
• Be a mentor and lead a team of Digital design engineers
• Work with Systems and Test engineering team to help validate the parts and release them to production

We are looking for trailblazers ...

We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring our vision to fruition.

If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us.

We are a equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.