Senior Silicon Design Verification Engineer, Google Cloud

Google Inc.; Bengaluru; On-site; INR 1,200,000 - 2,000,000; Full time

Job summary

Google Inc. is looking for a Senior Silicon Design Verification Engineer to lead the verification process for digital design blocks in Bengaluru, Karnataka. The role involves building constrained-random verification frameworks and ensuring functionality and performance in AI workloads.

The ideal candidate will have at least 8 years of experience in verification, with a strong background in SystemVerilog and networking systems. A Bachelor’s degree in a related field is required, with a Master's or PhD preferred.

Qualifications

• 8 years of experience in verification at RTL level.
• Experience verifying digital systems and components in networking.
• Proficient in writing coverage measures for verification.

Responsibilities

• Plan the verification of digital design blocks.
• Identify and write coverage measures for verification.
• Debug tests with design engineers.

Skills

Verifying digital logic

Experience with SystemVerilog

Excellent problem-solving skills

Communication skills

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree or PhD

Tools

Universal Verification Methodology (UVM)

Industry-standard simulators

Job description

Senior Silicon Design Verification Engineer, Google Cloud

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of experience in verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
• Experience in verification and debugging of IP/subsystem/SoCs in the networking domain such as packet processing, bandwidth management, congestion control.
• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience with industry‑standard simulators, revision control systems, and regression systems.
• Experience in Artificial Intelligence / Machine Learning (AI/ML) accelerators or vector processing units.
• Experience with the full verification life cycle.
• Excellent problem‑solving and communication skills.

Role Summary

In this role, you will own the full verification life‑cycle from planning and test execution to coverage closure, with an emphasis on meeting stringent AI/ML performance and accuracy goals. You will build constrained‑random verification environments capable of exposing corner‑case bugs and ensuring the reliability of AI workloads on TPU hardware.

Responsibilities

• Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios.
• Identify and write all types of coverage measures for stimulus and corner‑cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Measure to identify verification holes and to show progress towards tape‑out.
• Create a constrained‑random verification environment using SystemVerilog and Universal Verification Methodology (UVM).

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.