Senior SerDes Analog Design

Omni Design Technologies, Inc.

Bengaluru

On-site

INR 4,000,000 - 6,000,000

Full time

22 hours ago
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Job summary

Omni Design Technologies, Inc. is seeking a senior SerDes analog designer to develop 100Gbps+ wireline ICs. You will own transistor-level design from initial spec through layout supervision, silicon evaluation and product introduction.

Strong collaboration with customers and teams across geographies is essential. The role demands 10+ years in analog/mixed-signal IC development in advanced CMOS, deep knowledge of high-speed blocks, and hands-on bench and simulation expertise using Cadence tools.

Qualifications

  • 10+ years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processes
  • Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc.
  • Must have a track record of successfully taking designs to production
  • Ability to work with customers to define products that address needs
  • Must have experience with evaluating silicon on bench and familiarity with standard lab equipment
  • Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis
  • Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks
  • Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
  • MATLAB understanding would be preferred but not mandatory
  • Familiar with designing circuits for electromigration and ESD compliance in submicron CMOS process
  • Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes
  • Must be able to work independently, create and adhere to schedules
  • Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations

Responsibilities

  • Lead design and development of SerDes analog circuits for 100Gbps+ wireline systems
  • Drive transistor-level design from spec through layout supervision, silicon evaluation and release
  • Collaborate with customers and cross-functional teams to define product requirements
  • Ensure designs meet reliability, ESD and electromigration targets
  • Validate designs using bench measurements and simulations across CMOS processes

Skills

SerDes design
High-speed CMOS
Circuit design
Layout parasitic extraction
Cadence Virtuoso
SPICE simulation (HSPICE/Spectre)
Transistor-level design
Team communication

Tools

Cadence
Virtuoso
Spectre
HSPICE

Job description

SerDes analog designer focusing 100Gbps+ wireline technologies (TX and RX path). The successful candidate in this role will develop cutting-edge circuits and architectures for ultra-high speed wireline communication systems, and will drive the development of high performance transistor level design starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market.

Qualifications
  • 10+ years of experience in high-performance analog or mixed-signal IC development in advanced CMOS processes
  • Familiarity with high-speed analog design and building block circuits for SERDES technology such as ADC/DAC, CTLE, CDR, PLL etc.
  • Must have a track record of successfully taking designs to production
  • Ability to work with customers to define products that address needs
  • Must have experience with evaluating silicon on bench and familiarity with standard lab equipment
  • Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis
  • Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks
  • Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
  • MATLAB understanding would be preferred but not mandatory
  • Familiar with designing circuits for electromigration and ESD compliance in submicron CMOS process
  • Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes
  • Must be able to work independently, create and adhere to schedules
  • Must possess strong written and verbal communication skills with an ability to work with teams spread across geographic locations
We are looking for trailblazers

We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design’s vision to fruition.

Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

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