Senior PMIC Analog Design Engineer

Mulya Technologies; Bengaluru; On-site; INR 1,400,000 - 2,400,000; Full time

Job summary

Phytau Semiconductors in India is seeking a hands-on Lead PMIC Analog Design Engineer to drive PMIC analog blocks from architecture to silicon.

You will lead transistor-level design, optimize across PVT, and collaborate with system, layout, verification, and applications teams, mentoring juniors and conducting design reviews.

Must have 4–6 years in Analog/Mixed‑Signal IC Design, strong CMOS fundamentals, Cadence Virtuoso/Spectre experience, and a degree in Electronics.

Qualifications

• 4–6 years of experience in Analog/Mixed‑Signal IC Design
• Strong fundamentals in CMOS analog circuit design, feedback, stability, noise, matching, and PVT analysis
• Hands‑on experience with Cadence Virtuoso/Spectre or equivalent
• Good understanding of analog layout and parasitic effects
• Strong problem‑solving and ownership mindset
• B.E./B.Tech/M.E./M.Tech in Electronics/Electrical Engineering or related field

Responsibilities

• Lead transistor-level design of PMIC analog blocks from specification to silicon
• Design and optimize circuits across PVT, Monte Carlo, mismatch, and post-layout corners
• Work on blocks such as LDOs, bandgaps, references, amplifiers, bias circuits, POR, charge pumps, and power-control circuits
• Drive schematic design, simulations, layout reviews, and post-layout verification
• Support silicon bring-up, characterization, and debug
• Mentor junior engineers and conduct design reviews
• Collaborate with system, layout, verification, and application teams

Skills

Analog IC design

Problem-solving

Ownership mindset

Education

B.E./B.Tech/M.E./M.Tech in Electronics/Electrical Engineering

Tools

Cadence Virtuoso/Spectre

Job description

Phytau Semiconductors is a specialist semiconductor design company built around one core strength: solving difficult analog and high-speed silicon problems.

We specialize in Analog, Clocking, and SerDes, with deep expertise in the circuits that determine the performance of modern high‑speed chips. Our work spans high‑speed SerDes, PLLs, CDRs, injection‑locked oscillators, clocking architectures, and precision analog—from architectural decisions down to transistor‑level implementation.

We believe the hardest semiconductor problems are rarely solved by circuit design alone. They require a combination of strong fundamentals, architectural insight, attention to implementation, and relentless silicon‑oriented debugging. This is the engineering culture we have built at Phytau.

Our engineers take end‑to‑end ownership—from understanding the system problem and defining the architecture, through circuit design, simulation, layout interaction, post‑layout optimization, and silicon bring‑up.

We partner with semiconductor companies that need deep analog expertise without compromising on execution. Whether it is pushing the limits of speed, jitter, power, or performance, Phytau brings the technical depth and ownership needed to turn challenging specifications into working silicon.

We don't aim to be the largest design team. We aim to be the team you call when the silicon problem is hard.

Experience: 4–6 Years | Location: India | Type: Full‑time

Role

We are looking for a hands‑on Lead PMIC Analog Design Engineer to lead the design and development of analog/power‑management circuits from architecture through silicon.

Responsibilities

• Lead transistor‑level design of PMIC analog blocks from specification to silicon.
• Design and optimize circuits across PVT, Monte Carlo, mismatch, and post‑layout corners.
• Work on blocks such as LDOs, bandgaps, references, amplifiers, bias circuits, POR, charge pumps, and power‑control circuits.
• Drive schematic design, simulations, layout reviews, and post‑layout verification.
• Support silicon bring‑up, characterization, and debug.
• Mentor junior engineers and conduct design reviews.
• Collaborate with system, layout, verification, and application teams.

Requirements

• 4–6 years of experience in Analog/Mixed‑Signal IC Design, preferably PMIC.
• Strong fundamentals in CMOS analog circuit design, feedback, stability, noise, matching, and PVT analysis.
• Hands‑on experience with Cadence Virtuoso/Spectre or equivalent.
• Good understanding of analog layout and parasitic effects.
• Strong problem‑solving and ownership mindset.
• B.E./B.Tech/M.E./M.Tech in Electronics/Electrical Engineering or related field.

Good to have:

BCD/HV CMOS, automotive/industrial PMIC experience, silicon debug, and reliability knowledge.