Senior NPU Architect

Mulya Technologies; Bengaluru; Presencial; INR 5.000.000 - 9.000.000; Jornada completa

Descripción de la vacante

EnCharge AI is seeking a Senior NPU Architect to join our Architecture Team. You will define and optimize AI accelerator features based on in-memory computing, collaborating with hardware and software teams to deliver high-performance HW/SW solutions for workloads like LLMs and diffusion models.

The role requires extensive experience in computer architecture, HDL familiarity, and proficiency in C/C++ and Python, with a focus on designing scalable, efficient architectures for edge-to-cloud AI

Formación

• BS or MS in EE/CS with 12-18 years of relevant experience; PhD preferred.
• Strong knowledge of computer architecture and micro-architecture concepts.
• Proficiency in C/C++ and Python; experience with Verilog/SystemVerilog.

Responsabilidades

• Define and develop the spec, architecture, and micro-architecture of key architecture modules (in-memory compute unit, on-chip network, memory orchestration).
• Model architecture modules in a C++ simulation framework to ensure functional implementations.
• Collaborate with design verification to plan testing of architecture features within modules.
• Analyze performance and efficiency of architecture modules for workloads; identify bottlenecks and guide decisions.
• Stay updated on AI workloads, architectures, and applications to shape future generations.

Conocimientos

C/C++

Python

Computer architecture

AI/ML workloads

Educación

BS/MS in EE/CS

Ph.D. in related field

Herramientas

Verilog/SystemVerilog

C++ simulation framework

Descripción del empleo

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems.

About the Role

EnCharge AI is seeking a Senior NPU Architect to join our Architecture Team. In this role, you will collaborate with a team of NPU and system architects, hardware engineers, and software teams to define and optimize key features in our AI accelerator with the cutting-edge in-memory computing technology. You will contribute to designing a holistic AI HW/SW solution that has the best performance and efficiency on the market for the latest AI/ML workloads, such as LLMs, diffusion models, CNNs, and more.

Responsibilities

• Define and develop the spec, architecture, and micro-architecture of key architecture modules (such as the in-memory compute unit, on-chip network, and memory orchestration units) based on the requirements of the workloads and software deployment flow
• Contribute to the modeling of aforementioned key architecture modules in our C++ simulation framework to ensure a functional implementation of the features
• Collaborate with the design verification team to deliver a strategy and infrastructure for the testing of the architecture features within said modules
• Work with the software team and other architects to analyze the performance and efficiency of the architecture modules for key workloads, identify performance bottlenecks, and guide architectural decisions
• Stay up to date with the latest trends and research in AI workloads, architectures, and applications to help define a path for the future generations of architectures

Qualifications

• BS or MS in EE, CS, or a related field with 12-18 years of relevant experience.
• Preferred: Ph.D. in a related field with 9-12 years of relevant experience.
• Understanding in computer architecture, digital design, and micro-architecture concepts
• Familiarity with AI/ML algorithms, frameworks, and workloads
• Programming experience in C/C++ and Python
• Experience with HDLs such as Verilog or System Verilog