Senior Mask Design Engineer – Hardware

NVIDIA AI; Bengaluru; On-site; INR 1,800,000 - 3,000,000; Full time

Job summary

NVIDIA AI in Bengaluru is seeking a Senior Mask Design Engineer to contribute to advanced silicon interposer layouts and packaging design. You will collaborate with PTL and various design teams, perform physical layout using Cadence Virtuoso, and drive design feasibility studies in a fast-paced environment.

The role requires 5+ years in mask/layout design, strong CMOS layout knowledge, and experience with verification tools. A collaborative, proactive approach is essential for success.

Qualifications

• Hold a B.S. Electrical Engineering or equivalent experience.
• Minimum of 5+ years proven experience in Mask and Layout Design.
• Deep understanding of layout concepts in submicron CMOS technologies.
• Proficiency with Cadence layout tools - particularly Virtuoso.
• Knowledge of Integrity auto-routing is a plus.
• Experience with verification tools such as Calibre, ICV, Thunder.

Responsibilities

• Collaborate cross-functionally with PTL and engineers to deliver solutions for product packages under tight schedules.
• Perform physical layout for silicon interposer using Cadence tools.
• Conduct design feasibility studies to evaluate goals for size, cost, and system performance.
• Study layout floorplan and perform custom layout and verification against DRC and netlists.
• Propose layout design trade-offs to the PTL for resolution and implementation.

Skills

Teamwork

Interpersonal skills

Scripting

Education

B.S. Electrical Engineering or equivalent

Tools

Cadence Virtuoso

Calibre

ICV

Thunder

APD packaging tool

Job description

Job Requisition ID

JR2022881

Job Category

Engineering

Time Type

Full time

NVIDIA's GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions!

This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan scheules, resolve costs, manufacturing, and electrical design issues.

What You'll Be Doing

• You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule.
• Performing physical layout for silicon interposer using Cadence tools.
• Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance.
• Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists.
• Propose layout design trade-offs to the PTL for resolution and implementation.

What We Need To See

• Hold a B.S. Electrical Engineering or equivalent experience
• Minimum of 5+ years proven experience in Mask and Layout Design.
• Deep understanding of layout concepts in submicron CMOS technologies.
• You are an authority with Cadence layout tools - particularly Virtuoso.
• Knowledge of Integrity auto-routing is a plus.
• Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc.
• Proficient in scripting languages like Perl, Python, Skill, etc.
• Should have knowledge of DRC and LVS checking flows, ability to customize decks.
• Knowledge of APD package layout tool is a plus.
• Good understanding of packaging technology is useful.
• You can work optimally in a team, good interpersonal skills, passion and positive energy.

NVIDIA is widely considered to be one of the technology world's most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you