Senior GPU Logic Design Engineer

Intel Technology India Pvt Ltd; Bengaluru; Hybride; INR 3 600 000 - 7 200 000; Plein temps

Résumé du poste

Intel Technology India Pvt Ltd in Bengaluru is seeking a GPU Senior Logic Design Engineer to develop RTL for Media IP blocks and deliver complete IP modules for SoC integration.

The role emphasizes architecture/microarchitecture features, verification, and optimization across power, performance, area, and timing targets, with an emphasis on media encoders/decoders and AI-assisted design tools. Hybrid work in India is supported.

Qualifications

• Bachelor's or Master's in Computer/Electrical Engineering with RTL design and SystemVerilog expertise.
• 8+ years of RTL design experience or 6+ years with a Master's degree.
• Experience with verification, synthesis, and timing analysis tools.

Responsabilités

• Conduct feature feasibility studies and microarchitecture design based on landing zone requirements.
• Design RTL for media encoder/decoder blocks and related digital logic.
• Develop and validate RTL design and ensure power, performance, area goals.
• Perform power, performance, area, and timing optimization for the design goals.
• Develop C/Perl behavioral models to support RTL verification.
• Utilize AI-assisted ASIC design and verification tools for specification development and verification collateral.

Connaissances

Verilog/SystemVerilog

RTL design

Logic verification

Synthesis and timing

C/Perl/Python

AI-assisted ASIC tools

Digital electronics

Computer architecture

Formation

Bachelor's degree in Computer/Electrical Engineering

Master's degree in Computer/Electrical Engineering

Description du poste

GPU Senior Logic Design Engineer Job Details: Job Description: GPU Senior Logic Design Engineer: Develop logic design, generate/write Register Transfer Level (RTL) code, and perform simulation for Media IP components. This includes generating essential components such as libraries and functional units and delivering complete IP blocks for full chip design integration. Participate in the definition of architecture and microarchitecture features of the block being designed. Apply various strategies, tools, and methods to generate/write RTL and optimize the logic to meet power, performance, area, timing goals, and design integrity for physical implementation. Review the verification plan and the implementation to ensure design features are correctly verified across verification hierarchies. Drive unit level verification and implement corrective measures for failing RTL tests to ensure feature correctness. Supports SoC customers to ensure high-quality integration of Media IP block. Your contributions will directly impact Intel's ability to deliver innovative graphics technologies to our customers, helping shape the future of computing.

Business group

Intel's Media HW Engineering team

Key Responsibilities

• Conduct feature feasibility studies, performance analysis, and microarchitecture design based on landing zone requirements
• Design a wide variety of digital logic functions with the emphasis on media encoder/decoder design
• Develop, implement, and validate Register Transfer Level (RTL) design
• Perform power, performance, area, and timing optimization to meet design goals
• Developing C or Perl behavioral models to support RTL functionality verification
• Utilize AI models to enhance specification development, RTL code generation, and verification collateral creation

Qualifications

Education and Experience

• Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field with 8+ years of industry experience in RTL design and logic development with expertise in System Verilog. OR Master's degree in Computer Engineering, Electrical Engineering, or a related field with 6+ years of industry experience in RTL design and logic development with expertise in System Verilog.

Required skills and experience

• Computer system architecture
• Digital electronics and logic design
• Verilog or System Verilog
• Logic verification, synthesis, and timing analysis tools
• C, Perl, and Python programming
• AI-assisted ASIC Design and Verification tools.

Preferred skills and experience

• Knowledge of video codec standards such as H.264, HEVC, VP8/9, AV1, VVC, and other popular codecs
• Advanced knowledge of microarchitecture fundamentals and logic design verification methodologies.
• Strong communication, collaboration, and problem-solving skills
• Self-motivated and self-directed, with the ability to work effectively both independently and as part of a team
• Proven ability to effectively debug microarchitecture and hardware simulations.

Job Type: Experienced Hire

Shift: Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.