Senior Engineer I - Design

FHLB Des Moines; Bengaluru; On-site; INR 3,000,000 - 6,000,000; Full time

Job summary

Microchip Technology Inc. in Bengaluru is seeking a Senior Engineer I - Design to drive next-generation high-performance, low-power SOC solutions.

You will work across verification, analog, validation and software teams to deliver RTL-based SOC designs and ensure silicon quality. The ideal candidate has 7+ years in digital SOC design with a strong low-power focus, expertise in Verilog/SystemVerilog, AXI/AMBA protocols, and experience in ASIC flow, DFT/MBIST, and power estimation.

Qualifications

• Bachelor's or master's degree in computer engineering, electrical engineering, or related field.
• Minimum 7+ years of experience in digital SOC design, with a focus on low-power design.
• Proficient in RTL design (Verilog/SystemVerilog), Low-power design, synthesis, timing constraint (SDC) and timing analysis.
• Experience with ASIC design flow including LINT, Formal, CDC/RDC, power estimations, MBIST/DFT concepts, and low-power design techniques.
• Strong understanding of SOC architecture (ARM/MIPS), bus protocols (AMBA, AXI, etc), and peripheral IPs (USB, Ethernet, I2C, SPI).
• Experience with Bus Matrix design.
• Experience with script Language such as TCL, Perl, and Python.
• Excellent English reading, writing and verbal communication skills.
• Strong analytical and problem-solving skills.
• We are looking for candidates who are self-motivators, energetic, and team players.

Responsibilities

• Contribute to SOC design from concept to tape-out.
• Implement SOC designs according to micro-architecture specifications, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC qualification meets required standards.
• Collaborate with verification teams to ensure thorough design verification according to test plans.
• Work with physical design teams to ensure successful integration and implementation.
• Participate in design reviews to ensure compliance with design standards and project requirements.
• Support the validation team in qualifying silicon ICs and debugging potential issues.
• Contribute to the development and optimization of low-power design techniques and power estimation methodologies.
• Interfacing with external vendors and IP sources to resolve problems.
• Ability to work well in a team and excellent problem solving, verbal and written communication skills.

Skills

RTL design

Low-power design

Synthesis

Timing analysis

Verilog/SystemVerilog

AMBA/AXI

Python/TCL/Perl

English communication

Education

Bachelor's or master's degree in computer engineering, electrical engineering, or related field

Tools

RTL design (Verilog/SystemVerilog)

Low-power design

Synthesis

Timing analysis

Power estimations

MBIST/DFT concepts

ARM/MIPS SOC architecture

AXI/AMBA protocols

Bus Matrix design

Python/TCL/Perl

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await!

Job Description

The Wireless Solutions Group is seeking an experienced Senior Engineer I - Design for our next generation high-performance, low-power wireless SoC and attach solutions. In this role, you will be responsible for the design of System-on-Chip (SOC) solutions for wireless applications. You will collaborate closely with cross-functional teams, including verification, analog, validation, and software engineers, to deliver high-quality products. Successful candidate requires strong collaboration across sites and functions, excellent communication, and the ability to thrive in a fast-paced, dynamic environment.

Key Responsibilities

• Contribute to SOC design from concept to tape-out.
• Implement SOC designs according to micro-architecture specifications and design documentation, performing RTL coding, synthesis, timing analysis, and executing the SOC design flow to ensure IC qualification meets required standards.
• Collaborate with verification teams to ensure thorough design verification according to test plans.
• Work with physical design teams to ensure successful integration and implementation.
• Participate in design reviews to ensure compliance with design standards and project requirements.
• Support the validation team in qualifying silicon ICs and debugging potential issues.
• Contribute to the development and optimization of low-power design techniques and power estimation methodologies.
• Interfacing with external vendors and IP sources to resolve problems.
• Ability to work well in a team and excellent problem solving, verbal and written communication skills.

Requirements/Qualifications

• Bachelor's or master’s degree in computer engineering, electrical engineering, or related field.
• Minimum 7+ years of experience in digital SOC design, with a focus on low-power design.
• Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint (SDC) and timing analysis.
• Experience with ASIC design flow including LINT, Formal, CDC/RDC, power estimations, MBIST/DFT concepts, and low-power design techniques.
• Strong understanding of SOC architecture (ARM/MIPS), bus protocols (AMBA, AXI, etc.), and peripheral IPs (USB, Ethernet, I2C, SPI, etc).
• Experience with Bus Matrix design.
• Experience with script Language such as TCL, Perl, and Python.
• Excellent English reading, writing and verbal communication skills.
• Strong analytical and problem-solving skills.
• We are looking for candidates who are self-motivators, energetic, and team players.

Preferred Skills and Experience

• Knowledge of Bluetooth/BLE/Wi-Fi communication theory and standard specifications.
• Knowledge of security features and principles of functional safety–compliant design.
• Experience with verification methodologies (UVM/OVM).
• Experience with validation methodologies, including debugging on FPGA and silicon IC boards.

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