Senior Engineer , Analog Design

1840 Micron Tech. OP India LLP; Hyderabad; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

1840 Micron Tech. OP India LLP is seeking engineers to contribute to the development of new Memory/Logic/Analog circuit opportunities, including design, layout, and optimization for advanced DRAM products.

The role emphasizes analog power management IPs, parasitic modeling, and cross‑group collaboration to ensure manufacturability and high design quality in a dynamic semiconductor environment.

Responsibilities

• Assist with design, layout, and optimization of Memory/Logic/Analog circuits to create new product opportunities.
• Design and improve complex Analog Power Management IPs (Bandgap, references, Regulators, charge pumps, CMOS amps) for DRAM.
• Parasitic modeling and assisting in design validation, reticle experiments and required tape‑out revisions.
• Overseeing and managing the layout process including floor‑planning, placement, and routing.
• Performing verification processes with modeling and simulation using industry standard simulators.
• Collaborate with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering to ensure manufacturability.
• Solicit guidance from Standards, CAD, modeling, and verification groups to raise design quality.
• Drive innovation in future Memory generations within a dynamic environment.
• All qualified applicants will be considered without regard to race, religion, sex, or national origin.

Job description

Responsibilities

• Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits.
• Design, implementation, and improvement of Complex Analog Power Management IPs such as Bandgap reference, Voltage/Current reference, Regulators, Charge‑pumps, CMOS Amplifiers, Comparators in advanced semiconductor process nodes for advanced DRAM products.
• Parasitic modeling and assisting in design validation, reticle experiments and required tape‑out revisions.
• Overseeing and managing the layout process including floor‑planning, placement, and routing.
• Performing verification processes with modeling and simulation using industry standard simulators.
• Contributing to cross‑group communication to work toward standardization and group success.
• Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product.
• Proactively soliciting guidance from Standards, CAD, modeling, and verification groups to improve the design quality.
• Driving innovation into the future Memory generations within a dynamic work environment.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.