Senior Digital Design Engineer

118-WW TMG MFG OPS; India; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

118-WW TMG MFG OPS is seeking a design engineer to work on high-speed mixed-signal circuits, RTL coding, simulation, synthesis, and timing closure for advanced digital and analog interfaces.

You will collaborate with analog and digital design teams, prepare test methods and data sheets, and ensure timely completion of multiple tasks with clear instructions.

Qualifications

• 5+ years of relevant experience.
• A thorough understanding of digital logic design.
• Familiarity with the Verilog language and simulators.
• A good understanding of analog functionality and exposure to analog IC design methods.
• Ability to solve problems using a systematic approach.

Responsibilities

• RTL coding, simulation, synthesis, timing closure, verification and debugging of high-speed communication chips.
• Prepare test methods and specifications, assist in data sheets and demo boards.
• Develop solutions to complex problems through assessment of techniques and approaches.
• Plan and organize work to ensure timely completion of multiple tasks with clear instructions.

Skills

Digital logic design

Verilog

SystemVerilog

Debugging & problem solving

Tools

Verilog simulators

EDA tools

Job description

Change the world. Love your job.
In this position, you will be working on high-speed mixed-signal communication circuits using state-of-the art process technology, as well as be involved in the design of high performance digital circuits interfacing to leading edge analog circuitry as part of an overall system.

Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification, evaluation, debugging of high-speed communication chips both at the circuit level and behavioral level.

As a design engineer, you will prepare test methods and specifications, assist in preparation of application information, data sheets and demo boards. You will develop solutions to complex problems through assessment of various techniques and approaches. You will plan and organize work to ensure timely completion of many independent tasks with general instructions on routine tasks and with detailed instructions on new assignments.

This position involves routine communication with a highly talented team of analog and digital design engineers to solve problems and present information as well as active participation in work groups, providing ideas and collaborative teamwork.

Minimum requirements:

• 5+ years of relevant experience


• A thorough understanding of digital logic design


• Familiarity with the Verilog language and simulators


• A good understanding of analog functionality and exposure to analog IC design methods


• Ability to solve problems using a systematic approach

Preferred qualifications:

• Experience with System Verilog


• Demonstrated strong analytical and problem solving skills


• Strong verbal and written communication skills


• Ability to work in teams and collaborate effectively with people in different functions


• Strong time management skills that enable on-time project delivery


• Demonstrated ability to build strong, influential relationships


• Ability to work effectively in a fast-paced and rapidly changing environment


• Ability to take the initiative and drive for results