Senior Design for Test (DFT) Solutions Engineer

Synopsys India Pvt Ltd; Bengaluru; On-site; INR 4,500,000 - 7,500,000; Full time

Job summary

Synopsys India Pvt Ltd is seeking a Staff DFT Solutions Engineer to help design, validate, and automate DFT flows for advanced semiconductor chips. You will develop detailed test plans, write automated tests in Verilog/SystemVerilog/VHDL, and collaborate with Product Engineering and R&D to tailor solutions to customer architectures.

The role emphasizes strong scripting, RTL knowledge, and experience with JTAG/MBIST/Scan, alongside problem-solving and effective communication within

Qualifications

• 3+ years of hands-on experience in DFT, scripting, and software automation.
• Proficiency in RTL coding using Verilog, SystemVerilog, and/or VHDL.
• Strong analytical mindset and problem-solving abilities.

Responsibilities

• Develop detailed test plans and automate test cases using Verilog, SystemVerilog, or VHDL.
• Review specifications and test plans to ensure feature completeness and readiness.
• Collaborate with Product Eng. and R&D to create in-house test cases and scalable DFT solutions.
• Perform Quality of Results (QOR) analysis and root-cause analysis across ASIC flow.
• Focus on DFT features like compression and ATPG for SSAF, TDF, and cell-aware faults.
• Conduct diagnostics and debugging to improve tool reliability and performance.
• Work with AI agents to review and create assistive documentation for test products.
• Manage performance, installation, and license testing for customer experience.

Skills

Analytical thinking

Problem solving

Communication

Collaboration

Attention to detail

Proactiveness

Education

Bachelor's/Master's/MTech in Electrical/Electronics/CS

Tools

Verilog

SystemVerilog

VHDL

JTAG

MBIST

Scan

Perl

Tcl/Tk

Python

Perforce

Job description

General Information

Staff DFT Solutions Engineer General Information Job Title Staff DFT Solutions Engineer Job ID 16890 Country India City Bengaluru Date Posted 07-Apr-2026 Job Category Engineering Job Subcategory Solutions Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements

Job Description and Requirements

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an inventive and detail-oriented engineer with a strong foundation in Computer Science or Electronics, and a passion for advancing the frontiers of Design for Test (DFT) technology. With 3+ years of hands-on experience in DFT, scripting, and software automation, you are eager to take on complex challenges in the rapidly evolving semiconductor industry. You excel in both independent and collaborative environments, thriving in project-oriented settings where you can develop, automate, and validate sophisticated DFT flows and methodologies. Your curiosity and drive for continuous learning make you adept at keeping up with the latest advancements in Autonomous Transportation, Mission Critical AI, High Performance Computing, and Mobile Networking. As a candidate, you possess a keen analytical mindset and enjoy problem solving, particularly when it comes to troubleshooting and root cause analysis. You are comfortable working closely with cross-functional teams, providing valuable feedback, and contributing to product readiness. Your experience with scripting languages, RTL coding, and a variety of DFT technologies enables you to deliver scalable solutions tailored to customer architectures and methodologies. You embrace the opportunity to work with cutting-edge tools, including AI-enabled agents, and take pride in producing high-quality documentation and pragmatic solutions. Your exceptional communication and networking skills allow you to bridge gaps between engineering and R&D, ensuring the highest standards in test solutions.

What You’ll Be Doing:

• Developing detailed test plans, incorporating new features into test cases, and executing/automating these test cases using Verilog, System Verilog, or VHDL.
• Reviewing specifications and test plans from other teams, offering feedback to ensure feature completeness and product readiness.
• Collaborating with Product Engineering and R&D teams to create in-house test cases and implement scalable DFT solutions based on customer requirements.
• Performing Quality of Results (QOR) analysis, troubleshooting, and root cause analysis to resolve complex technical issues across multiple aspects of the ASIC flow.
• Focusing on tool features such as DFT compression, ATPG for various fault models (SSAF, Transition Delay Fault, Cell-aware faults), and architecting solutions for Memory and Logic BIST.
• Conducting diagnostics analysis and debugging to enhance tool reliability and performance.
• Working with AI agents to review and create assistive or generative AI documentation for test products.
• Managing performance, installation, and license testing to ensure seamless customer experience.

The Impact You Will Have:

• Elevate the quality and performance of Synopsys' industry-leading DFT tools, directly contributing to customer success and business growth.
• Enable customers to implement robust test methodologies that improve silicon quality and accelerate time-to-market for advanced chips.
• Drive innovation in DFT automation, making cutting-edge solutions accessible across diverse industry segments, from AI to mobile networking.
• Strengthen Synopsys' reputation as a trusted partner in delivering scalable, reliable, and high-performance test solutions.
• Facilitate cross-team knowledge sharing by providing actionable feedback and creating comprehensive documentation.
• Advance the adoption of AI-driven testing and automation, keeping Synopsys at the forefront of technological advancement.
• Support the seamless integration of new features and methodologies, ensuring Synopsys products remain competitive and future-ready.

What You’ll Need:

• Bachelor's, Master's, or MTech in Electrical/Electronics Engineering, Computer Science, or a related field with 3+ years of relevant experience.
• Hands-on expertise in DFT technologies such as JTAG, MBIST, Scan, and related test architectures.
• Proficiency in RTL coding using Verilog, System Verilog, and/or VHDL.
• Advanced scripting skills in Perl, Tcl/Tk, Python, or similar languages for automation and tool integration.
• Familiarity with change management tools (e.g., Perforce) for collaborative development and version control.
• Solid understanding of ASIC design flow, including design planning, synthesis, physical design, and sign-off verification tools.

Who You Are:

• Analytical thinker with exceptional problem-solving skills and a passion for troubleshooting complex technical challenges.
• Effective communicator who excels in cross-functional team environments and can articulate technical concepts to varied audiences.
• Collaborative team player who values diverse perspectives and actively contributes to group success.
• Proactive and adaptable, with a strong desire to learn and innovate in a fast-paced, evolving technological landscape.
• Detail-oriented and organized, able to manage multiple priorities and deliver high-quality results on schedule.

The Team You’ll Be A Part Of:

You’ll join the Synopsys Test Group, a dynamic team focused on developing cutting-edge Design for Test (DFT) solutions. The team is composed of passionate engineers and innovators who collaborate across product engineering and R&D to create industry-leading methodologies and tools. Together, you will address challenges in diverse domains such as autonomous systems, AI, high-performance computing, and mobile networking, driving the next wave of silicon innovation.

#TPG

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Experience Level Senior Level