Senior ASIC Validation Engineer

Qualcomm Incorporated; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Qualcomm India Private Limited is seeking an experienced embedded engineer to design and debug low‑level drivers, bootloaders, and firmware for resource-constrained systems. You will work closely with hardware, RTL and DV teams to validate SoCs and drive post-silicon bring-up initiatives.

The role requires strong C/C++ skills, Python proficiency, and deep understanding of HW initialization, diagnostics, and power/performance optimization.

Qualifications

• Bachelor's degree in Science, Engineering, or related field.
• 2+ years of ASIC design, verification, validation, integration, or related work experience (for Master’s: 1+ year).
• PhD in Science, Engineering, or related field is a plus.

Responsibilities

• Develop low-level drivers, bootloaders, BSPs, middleware, and application firmware.
• Collaborate with hardware, RTL and DV teams to debug modules.
• Lead post-silicon bring-up and validation of ASIC/SoC modules.
• Drive root-cause analysis of silicon, firmware, and system-level issues.
• Develop production-quality software with testing, documentation, and CI/CD pipelines.
• Create Python-based automation frameworks for validation and regression testing.
• Interact with hardware, software and other teams to validate SoCs with minimal delays.

Skills

C/C++ programming

Python

Embedded firmware

Hardware debugging

System software

ARM Cortex familiarity

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

JTAG

Git

Jira

Confluence

Job description

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Job Description

Strong programming skills in C and C++ for resource-constrained systems

Proficent in Python programming

Excellent knowledge in low level firmware/ baremetal HW/IP driver writing .

Root-cause analysis of silicon failures abd Hardware debug and failure isolation

Performance characterization and Power and thermal validation

Indepth understand of the HW is must

Should have exposure to Hardware initialization, Validation diagnostics development and firmware optimisations

Good knowledge of how to use embedded development tools such as JTAG and associated debug tools

Work experience on ARM Cortex platform/ MIPS/RISC-V cpus.

Work Experience with FPGAs based platforms is plus

Should have good knowledge of System software stack, Power Management, High speed peripherals, USB, SDIO,Ethernet,PCIe etc and memory subsystem like DDR/LPDDR etc.

Exposure to PCIe Gen4/Gen5/Gen6,25G/50G/100G/200G/400G Ethernet,CXL,DDR4/DDR5/LPDDR,SerDes,UCIe interface validation

Familiarity with software configuration management tools, defect tracking tools, and peer review.

Work Experience with FPGAs based platforms is plus

Work experience on Heterogeneous and Multiprocessor SoC platforms.

Exposure to Pre-Silicon environment with RTL Co-Simulations is plus point

Experience with development environments such as Linux, Git, Jira and Confluence

Strong communication skills to exchange ideas and work as a team

Responsibilities

• Develop low-level drivers, bootloaders, BSPs, middleware, and application firmware.
• Work closely with hardware,RTL and DV engineers to develop and debug.
• Lead post-silicon bring-up and validation of given module of ASIC/SoC products.
• Drive debug and root-cause analysis of silicon, firmware, and system-level issues.
• Develop firmware and low-level software required for silicon bring-up, subsystem enablement, and debug.
• Debug complex hardware-software integration issues using oscilloscopes, logic analyzers, protocol analyzers, JTAG/SWD debuggers, and other laboratory equipment.
• Analyze protocol traces, link training behavior, LTSSM states, error logs, and performance bottlenecks.
• Develop production-quality software, including testing, documentation, static analysis, and CI/CD/CT
• Develop Python-based automation frameworks for validation and regression testing.
• Interacting with hardware, software and other teams to validate SoCs with minimum delays

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field.

Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

If you would like more information about this role, please contact Qualcomm Careers .