Reliability Engineer

Navitas Semiconductor Usa; Pune District; Vor Ort; INR 1.200.000 - 1.800.000; Vollzeit

Zusammenfassung

Navitas Semiconductor Usa in Pune is seeking a reliability engineer to define and execute qualification testing for high‑voltage GaN HEMTs and SiC MOSFETs, ensuring compliance with JEDEC, AEC‑Q101, and AQG324.

You will evaluate reliability metrics, coordinate cross‑functional projects with Operations, Product Engineering, and Test Development, and manage external test execution. A strong background in electrical characterization and lab operations is essential.

Qualifikationen

• Bachelor’s degree in engineering or related technical discipline.
• 3+ years in semiconductor reliability testing or lab operations.
• Ability to interpret qualification circuits and test fixtures.

Aufgaben

• Plan and execute qualification testing for GaN HEMTs and SiC MOSFETs against JEDEC/AEC standards.
• Evaluate, track reliability metrics and present reports to management.
• Coordinate reliability projects with Operations, Product Engineering and Test Development.
• Analyze data to predict and improve product reliability.

Kenntnisse

Reliability engineering

Electrical characterization

System-level qualification

Data analysis

Lab operations

Ausbildung

Bachelor’s degree in Electrical Engineering or related field

Tools

Cadence

Altium

ATE testing

Oscilloscopes

Jobbeschreibung

Job Details

Job Location: Pune

Key Responsibilities and Duties:

• Define, plan, and execute comprehensive qualification testing for high-voltage GaN HEMTs and SiC MOSFETs to meet industrial and automotive standards (JEDEC, AEC-Q101, and AQG324).
• Evaluate, track reliability metrics and present reports to management teams.
• Coordinate reliability engineering projects and align cross-functional readiness with Operations, Product Engineering, and Test Development teams to support qualification execution.
• Analyze product usage and performance data to predict and improve product reliability.
• Conduct Failure mode and effects analysis and root cause analysis on failed devices. Investigate and mitigate WBG-specific degradation modes, including dynamic RDS(on) shift, gate oxide instability, threshold voltage drift, trapping effects, or any package related failures.
• Partner closely with device design, process integration, and Failure Analysis (FA) teams to isolate root causes of device failure and implement physical corrective actions.
• Manage external reliability test execution, including test plan communication, sample logistics, stress condition verification, data collection, and schedule tracking.
• Operate electrical lab bench instrumentation, including oscilloscopes, function generators, programmable power supplies, digital multimeters, electronic loads, and in-situ DAQ systems.
• Identify potential failure points and develop mitigation strategies.
• Identify, evaluate, and qualify new suppliers for PCB fabrication, assembly, tooling, and test services to improve cost, lead time, quality, and execution flexibility.
• Perform additional reliability engineering, lab operations, hardware development, and qualification-support duties as assigned.

Qualifications KSAOs:

• Operates effectively in a high-mix engineering lab environment supporting concurrent hardware design, reliability stress testing, and qualification execution priorities.
• Demonstrates initiative in expanding technical proficiency across PCB design, electrical characterization, bench instrumentation, and reliability test methodologies.
• Adapts technical workload to changing qualification schedules, engineering priorities, hardware availability, and reliability lab capacity constraints.
• Prioritizes multiple hardware development, debug, procurement, and external test activities to maintain qualification timelines and engineering deliverables.
• Applies Reliability engineering methods, statistical analysis and reliability prediction tools.
• Maintains technical ownership, data accuracy, documentation discipline, and traceability for hardware builds, test setups, and reliability execution records.
• Collaborates with Product Engineering, Test Development, Operations, suppliers, and external labs to resolve technical issues and support qualification readiness.
• Familiar with JEDEC standards including Burn-in, Temperature Cycling, Temperature Humidity Bias, HAST, MSL, Power Cycle and other non-biased environmental conditions.
• Foundational understanding of semiconductor device physics, specifically regarding high-voltage power devices, p-n junctions, and wide bandgap material properties.
• Familiarity with ATE test.

Requirements:

• Bachelor’s degree in engineering (Electrical Engineering, Mechanical Engineering, Materials Science, Semiconductor Engineering) or a closely related technical discipline.
• Minimum 3 years of hands‑on experience in semiconductor reliability testing, electrical characterization, qualification execution, failure analysis support, or engineering lab operations.
• Ability to interpret and technically review qualification circuits, including biasing schemes, stress‑condition implementation, device connections, protection elements, measurement points, and test-fixture interfaces.
• Some knowledge of PCB schematic and layout tools such as Cadence or Altium, including schematic capture review, component placement assessment, routing and stack‑up review, design‑rule verification, and fabrication/assembly package generation.
• Ability to safely handle, transport, position, and set up laboratory equipment, reliability stress fixtures, PCB assemblies, cabling, and related hardware up to 25 lbs. unassisted while following ESD, ergonomic, and lab‑safety practices.