Principal Silicon Verification Engineer - Bengaluru Bengaluru, India

graphcore

Bengaluru

On-site

INR 2,000,000 - 3,000,000

Full time

14 days+
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Job summary

Graphcore is seeking a Silicon Verification Engineer in India to work within the silicon verification team. This role involves verification activities, planning functional coverage, providing architect feedback, and contributing to shared verification infrastructure. Candidates should have 12-14 years of experience, with skills in System Verilog, Python, C++, Linux, and the verification process applied in CPU and/or ASIC environments. Leadership and problem-solving skills are essential for successful teamwork.

Qualifications

  • 12-14 years of experience in an engineering background.
  • Ability to work across teams and programming languages.
  • Exercises independent judgment in developing methods and techniques.
  • Ability to research and solve complex problems.

Responsibilities

  • Perform verification activities within the verification team.
  • Conduct verification planning and specification.
  • Provide feedback to architects.
  • Generate tests and diagnose failures.
  • Contribute to the shared verification infrastructure.

Skills

verification experience in relevant industry
leadership and planning skills
problem-solving skills
Technical and functional knowledge
experience with System Verilog
experience with Python
experience with C++
experience with Linux
experience with UVM
experience with SVA
experience with assembly languages
experience with LLVM
experience with GCC
experience with DVCS (e.g., Git)
experience with SGE or other DRMS
experience with XML and XPath/XSLT

Job description

Job Summary

Working within the Silicon verification team, the silicon verification engineer is responsible for a wide range of tasks within the silicon verification team. This person is responsible for verification activities within Graphcore, helping the silicon team meet the company objectives for quality silicon delivery.

The Team

The verification team sits within the Silicon design team. We are responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon.

Responsibilities and Duties
  • Verification activities within the verification team
  • Verification planning, specification and closure of functional coverage
  • Providing feedback to architects
  • Test generation and failure diagnosis/triage
  • Contributing to shared verification infrastructure
Candidate Profile
  • verification experience in relevant industry
  • Proven leadership and planning skills
  • Be highly motivated, a self starter, and a team player
  • Ability to work across teams and programming languages to find root causes of deep and complex issues
  • Ability to research along with the knowledge to solve complex problems
  • Presents technical and functional knowledge to design experiments/ projects that contribute to overall direction of team
  • Exercises independent judgment in developing methods, techniques and evaluation criteria for obtaining results
  • Highly influential on colleagues with ability to explain difficult concepts
  • Experience of the verification process applied in CPU and/or ASIC environments
  • System Verilog, Python, C++, Linux
  • 12 – 14 years-experience in engineering background
  • UVM
  • SVA
  • Assembly languages
  • LLVM, GCC
  • DVCS e.g. Git
  • SGE or other DRMS
  • XML and XPath/XSLT
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