Principal Engineer - Verification

Microchip Technology

Chennai

On-site

INR 3,500,000 - 6,000,000

Full time

5 days ago
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Job summary

Microchip Technology Inc. is seeking a Principal Verification Engineer to join the WSG product development team in Chennai.

You will architect and implement robust verification environments for unit and full-chip verification, while mentoring junior engineers and managing complex projects. You will lead tests using SystemVerilog and C-based directed tests, work with multiple teams to develop verification plans and drive coverage, and navigate challenging technical issues to ensure on-time

Qualifications

  • Proven experience in architecting and implementing robust verification environments for IPs/SoCs.
  • Strong leadership with experience managing small teams and mentoring junior engineers.
  • Hands-on with class-based SystemVerilog and C-based directed tests; strong debugging and coverage driven verification.

Responsibilities

  • Develop effective tests and test environments using SystemVerilog and C-based directed tests to meet verification goals.
  • Collaborate with verification, architecture, applications, and design teams to create comprehensive verification plans.
  • Own verification activities, provide technical guidance, and manage tasks to meet project schedules.
  • Define and develop functional assertions and coverage points for module and system levels.
  • Verify structural and functional coverage of both unit and system level test suites.

Skills

SystemVerilog
Verilog
C
C++
PERL
UVM/AVM/VMM
Leadership
Project management
Mentoring

Education

BSEE

Tools

Questa

Job description

Job Summary

Microchip Technology Inc. is looking for a self motivated individual to fill the position of Principal Verification Engineer within our WSG product development team. The successful candidate will have the ability to architect and implement robust verification environments for both unit level and full chip verification. Managing complex verification projects and mentoring junior level engineers will be an integral part of this position.

Key Responsibilities
  • Develop an effective suite of tests and test environments using a mix of class based SystemVerilog and C based directed tests to achieve predefined functional verification goals.
  • Actively participate in a team environment, working with verification, architecture, applications, and design teams to develop comprehensive verification plans and address issues.
  • Own and drive verification related activities, provide technical support, and proactively manage tasks to meet schedule goals.
  • Help define and develop effective functional assertions and cover points.
  • Verify structural and functional coverage of module and system level test suite.
Requirements / Qualifications
  • BSEE minimum with at least 7 years experience in the verification of large, complex IP and ICs.
  • Experience in project management and leadership of small teams.
  • Understanding of Microcontroller architectures and products.
  • Hands on experience with Questa or similar advanced simulation tools.
  • Advanced skills in various programming languages such as Verilog, System Verilog, C, C++, PERL
  • Working experience using an industry standard verification methodology (UVM/AVM/VMM).
Travel Time

0% - 25%

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