Principal Engineer/MTS/SMTS – TD ESD

NanoHelp; Hyderabad; On-site; INR 2,025,000 - 2,475,000; Full time

Job summary

A global technology leader seeks a Lead Advanced ESD Engineer in Hyderabad, India. Join a dynamic team focused on electrostatic discharge and latch-up protection for advanced memory technologies. Ideal candidates will have a PhD in Electrical Engineering and significant experience in ESD circuit design. This role offers the chance to lead innovative projects and collaborate globally in a cutting-edge field.

Qualifications

• Strong experience in advanced CMOS and Cadence tools.
• PhD (8+ years), MS (10-15 years), or BS (15-20 years) in relevant fields.
• Experience with ESD circuit design and wafer-level testing.

Responsibilities

• Lead advanced ESD and latch-up protection design.
• Develop robust solutions for next-generation memory technologies.
• Collaborate with global teams to ensure compliance with ESD guidelines.

Skills

Advanced ESD design

Latch-up protection

CMOS design

Cadence tools

Wafer-level testing

Education

PhD in Electrical Engineering

MS in Microelectronics

BS in Electrical Engineering

Tools

Pathfinder

PERC

Job description

Lead Advanced ESD & Latch-up Protection Design

Micron Technology seeks an experienced TD ESD Engineer to lead electrostatic discharge and latch-up design innovation for advanced memory chips. Join a top-tier global team in Hyderabad and shape the future of nanoscale semiconductor protection.

Job Details:

• Title: Principal Engineer / MTS / SMTS – TD ESD
• Organization: Micron Technology, Inc.
• Work Location: Hyderabad, Telangana, India
• Research Field: Nanotechnology, Electrical Engineering, CMOS Design, Applied Physics
• Funding: Industry-funded (Micron Technology)
• Application Deadline: Rolling
• Posted Date: July 2025
• Country: India

Responsibilities and Requirements:

• Lead advanced ESD and latch-up protection design for future memory technologies
• Develop robust ESD and LUP solutions for next-generation nanoscale memory technologies
• Design and validate ESD protection circuits, create test structures, and perform wafer-level measurements
• Collaborate with global design and R&D teams to ensure full-chip compliance with ESD design guidelines
• Strong experience in advanced CMOS, Cadence tools, and layout verification software like Pathfinder or PERC
• PhD/MS/BS in Electrical Engineering, Microelectronics
• Required qualification: PhD (8+ yrs), MS (10–15 yrs), or BS (15–20 yrs)
• Required experience: ESD circuit design, CMOS devices, wafer-level testing, Pathfinder tools

Micron Technology, a global leader in advanced memory and storage systems, is expanding its Technology Development ESD/Latch-up Design and Characterization Team in Hyderabad. This is an exciting opportunity for engineers passionate about electrostatic discharge (ESD) and latch-up (LUP) protection in cutting-edge memory devices.

Micron prohibits recruitment fees and misrepresentation through AI-generated resumes. Only genuine applications will be considered.

This role is ideal for professionals with a background in Electrical Engineering, Microelectronics, Applied Physics, or Nanotechnology, who are ready to lead, innovate, and collaborate in a dynamic industry.

Micron is an equal opportunities employer and welcomes applications from diverse candidates.