Principal Emulation Engineer

EnCharge AI; Bengaluru; Hybrid; INR 3,500,000 - 6,000,000; Full time

Job summary

EnCharge AI is seeking a senior Emulation Engineer to validate advanced AI accelerators on emulation platforms before tape-out. Lead efforts bridging hardware and software, set up emulation and prototyping environments, and collaborate with design and verification teams to accelerate debugging.

The ideal candidate has 10+ years in SoC design with hands-on experience in emulation platforms and RTL/SystemVerilog, and is proficient in Python, C/C++, and hardware debugging tools.

Qualifications

• BS/MS/Ph.D. in EE, CS, or related field with 10+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium).
• Experience with emulating high speed I/O interfaces such as PCIe/UCIe and memory tech like LPDDR/HBM
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.

Responsibilities

• Set up and maintain emulation and prototyping platforms.
• Adapt SoC designs for Emulation and Prototyping.
• Develop and debug emulation testbenches and system-level environments.
• Support pre-silicon validation, power/performance analysis, and early software bring-up.

Skills

SoC design

RTL Verilog/SystemVerilog

Emulation platforms

Python

C/C++

UVM

Hardware debugging

Education

BS/MS/PhD in EE/CS or related

Tools

Veloce

Palladium

ZeBu

proFPGA/HAPS/Protium

Job description

About Company

:
Emulation Engineer – Principal, Locations: Bangalor

Job Description:

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Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-o

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This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities:

• Set up and maintain Siemens Veloce emulation and prototyping platforms
• Adapt SoC designs for Emulation and Prototyping
• Develop and debug emulation testbenches and system-level environments
• Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation.
• Collaborate with design and verification teams to isolate design issues and accelerate debug.
• Optimize performance of the emulation workloads and reduce turnaround time.
• Work with firmware/software teams to enable use of emulators for OS and driver testing

. Required Background:

• BS/MS/Ph.D. in EE, CS, or related field with 10+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium)
• Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
• Proficiency in hardware debug tools, waveform viewers, and logic analyzers
• Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure development
• Familiarity with UVM, simulation, and testbench environments. SystemVerilog and UVM-based verification experience a plus
• Hand-on software development experience with C/C++ is