Emulation Engineer

EnCharge AI

Bengaluru

On-site

INR 3,000,000 - 5,000,000

Full time

14 days+

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Job summary

EnCharge AI in Bangalore is seeking an Emulation Engineer to validate AI accelerator architectures on emulation platforms before tape-out.

You will set up and maintain Veloce/Palladium/ZeBu emulation environments, adapt SoC designs for emulation, and collaborate with design teams to accelerate debugging and validation.

Qualifications

  • BS/MS/PhD in EE, CS or a related field with 3+ years of SoC design experience.
  • Experience with emulation platforms (Veloce, Palladium or ZeBu) and FPGA-based prototyping systems.
  • Strong understanding of digital design and RTL (Verilog/SystemVerilog).
  • Proficient in hardware debugging tools and scripting for automation.

Responsibilities

  • Set up and maintain emulation and prototyping platforms (Veloce, Palladium, ZeBu, etc.).
  • Adapt SoC designs for Emulation and Prototyping workflows.
  • Develop and debug emulation testbenches and system-level environments.
  • Support pre-silicon validation, power/performance analysis, and software bring-up.
  • Collaborate with design and verification teams to identify issues and speed debug.
  • Optimize emulation workloads to reduce turnaround time and improve throughput.
  • Work with firmware/software teams to enable emulators for OS and driver testing.

Skills

Digital design
RTL design
Hardware debugging
Python scripting

Education

BS/MS/PhD in EE or CS or related field

Tools

Veloce emulation
Palladium
ZeBu
proFPGA
HAPS
Protium
PCIe emulation
UCIe
LPDDR
HBM

Job description

About Company:

Emulation Engineer – , Locations: Bangalore,

Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out.

Responsibilities:
  • Set up and maintain Siemens Veloce emulation and prototyping platforms
  • Adapt SoC designs for Emulation and Prototyping
  • Develop and debug emulation testbenches and system-level environments
  • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation.
  • Collaborate with design and verification teams to isolate design issues and accelerate debug.
  • Optimize performance of the emulation workloads and reduce turnaround time.
  • Work with firmware/software teams to enable use of emulators for OS and driver testing
Required Background:
  • BS/MS/Ph.D. in EE, CS, or related field with 3+ years of SoC design experience.
  • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium)
  • Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM
  • Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
  • Proficiency in hardware debug tools, waveform viewers, and logic analyzers
  • Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure development
  • Familiarity with UVM, simulation, and testbench environments. SystemVerilog and UVM-based verification experience a plus
  • Hand‑on software development experience with C/C++ is a plus
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