Principal CAD Engineer

TylSemi, Inc.; Karnataka; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

TylSemi, Inc. in India seeks a Principal CAD Engineer to lead advanced VLSI CAD methodologies across RTL-to-GDS flows, collaborating with design, STA, DFT, and EDA vendors to enable successful tape-outs for complex SOCs.

You will architect scalable flows, drive automation, mentor teams, and integrate new tool releases while ensuring QoR, performance, and design productivity improvements across multiple projects.

Qualifications

• Bachelor’s or Master’s degree in Electronics, Computer Engineering, VLSI, or related field.
• 10+ years of CAD engineering, physical design, or EDA flow development.
• Expertise in ASIC/SOC flows: synthesis, P&R, STA, physical verification, low-power.
• Proficient in Tcl, Python, Perl, and Shell.

Responsibilities

• Architect, develop, and maintain scalable CAD flows for synthesis, physical design, STA, low-power verification, and sign-off.
• Drive automation and methodology improvements to enhance design efficiency, runtime, and QoR.
• Collaborate with design, verification, DFT, and implementation teams to understand flow requirements.
• Debug complex flow, tool, and infrastructure-related issues across project execution.
• Integrate and qualify new EDA tool releases and advanced node methodologies.
• Develop automation scripts, regression environments, dashboards, and flow monitoring infrastructure.
• Work with foundries and EDA vendors on technology enablement and issue resolution.
• Mentor engineers and establish CAD best practices across teams.

Skills

VLSI CAD

Leadership / Mentoring

Scripting: Tcl/Python/Perl/Shell

Debugging & problem solving

Stakeholder management

Education

Bachelor’s or Master’s degree in Electronics/CE/VLSI

Tools

Cadence

Synopsys

Siemens EDA

Job description

Role Overview

Principal CAD Engineer – responsible for leading the development, deployment, and support of advanced VLSI CAD methodologies and automation solutions. The role focuses on improving design productivity, quality, and scalability across RTL‑to‑GDS implementation flows, working closely with Physical Design, Frontend, DFT, STA, and EDA vendors to enable successful tape‑outs for complex SOCs.

Responsibilities

• Architect, develop, and maintain scalable CAD flows for synthesis, physical design, STA, low‑power verification, and sign‑off.
• Drive automation and methodology improvements to enhance design efficiency, runtime, and QoR.
• Collaborate with design, verification, DFT, and implementation teams to understand flow requirements and deployment challenges.
• Debug complex flow, tool, and infrastructure‑related issues across project execution.
• Integrate and qualify new EDA tool releases and advanced node methodologies.
• Develop automation scripts, regression environments, dashboards, and flow monitoring infrastructure.
• Work with foundries and EDA vendors on technology enablement and issue resolution.
• Mentor engineers and establish CAD best practices across teams.

Qualifications

• Bachelor’s or Master’s degree in Electronics, Computer Engineering, VLSI, or a related field.
• 10+ years of experience in CAD engineering, physical design methodology, or EDA flow development.
• Strong expertise in ASIC/SOC implementation flows including synthesis, P&R, STA, physical verification, and low‑power methodologies.
• Hands‑on experience with industry‑standard EDA tools such as Cadence, Synopsys, and Siemens EDA tool suites.
• Strong programming and scripting skills in Tcl, Python, Perl, and Shell scripting.
• Experience with distributed computing environments, regression frameworks, and infrastructure management.
• Strong debugging, analytical, communication, and stakeholder management skills.

Good to Have

• Experience with cloud‑enabled EDA infrastructure and workload management systems.
• Exposure to AI/ML‑driven CAD optimization methodologies.
• Knowledge of advanced technology nodes (5 nm/3 nm) and multi‑die design flows.

Success in This Role Looks Like

• Delivery of stable, scalable, and high‑quality CAD flows adopted across multiple projects.
• Significant improvements in design productivity, QoR, and runtime efficiency.
• Fast resolution of tool and flow issues minimizing project execution risk.
• Strong technical leadership, mentoring, and positive influence on engineering methodology.