PMIC Analog Design Engineer

118-WW TMG MFG OPS; Bengaluru; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

118-WW TMG MFG OPS is seeking an experienced Analog Designer with PMIC experience to drive block-level designs and own critical PMIC architectures. You will engage in circuit design, layout reviews, and simulations, collaborating with cross-functional teams to deliver high-performance IPs and products.

The role demands strong fundamentals in analog/mixed-signal design, high-voltage blocks, and proficiency with Cadence Virtuoso and Spectre.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 4+ years of analog/mixed-signal IC design experience with strong fundamentals.
• Experience with high-voltage circuit designs and high speed level shifters.
• Familiarity with Safe Operating Area (SOA) & Reliability, Aging sims.
• Understanding of mismatch effects and device noise; experience in auto-zeroing, chopping, and statistical analysis.
• Strong understanding of Control Systems fundamentals and compensation.
• Proficiency with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre).
• Experience with worst-case corner analysis, Monte Carlo, post-layout PEX sign-off.
• Knowledge of BCD/advanced CMOS process trade-offs for high-performance Power ICs.
• Ability to work independently and drive design decisions with quality and on schedule.

Responsibilities

• Design and deliver high-performance analog circuits for PMIC power converters (buck, boost, LDO, charge pump).
• Contribute to PMIC system architecture while meeting performance/area/power targets.
• Own full IC design flow: schematic, simulation, layout review, post-layout verification, silicon bring-up, characterization.
• Serve as primary technical owner for one or more blocks within multi-block PMIC products.
• Ensure design quality, robustness, and reliability through technical reviews.
• Collaborate with internal systems/architecture teams to resolve integration challenges.
• Mentor junior engineers on design methodology and tools.

Skills

Analog IC design

PMIC experience

Cadence Virtuoso

Spectre/PEX simulations

High-voltage design

Schematic capture & layout review

Block-level PMIC architecture

Education

Bachelor's degree in Electrical Engineering

Master's degree preferred

Tools

Cadence Virtuoso

Spectre

PEX

Simplis

AMS

Job description

Change the world. Love your job.

We are looking for a highly skilled and passionate Analog Designer, with PMIC experience preferred, to partner with senior technical leads to execute PMIC programs, otaking primary ownership of assigned blocks/sub-systems while receiving architectural guidance on system-level decisions. This is a deeply technical, hands-on role — you will be doing circuit design, participating in layout reviews, PEX simulations, analysis leading to architecture decisions, and collaborating with cross-functional experts to deliver successful IPs and Products. Following are the key responsibilities:

• Design and deliver high-performance analog circuits and blocks needed for power converter circuits — buck, boost, LDO, and charge pump — meeting aggressive targets for power performance, efficiency, and transients.
• Contribute towards PMIC system architecture development and execute block-level designs against challenging performance, power, and area specifications.
• Own technical execution across the full IC design flow: schematic capture, simulation, layout review, post-layout verification, silicon bring-up, and characterization
• Serve as primary technical owner for one or more complex blocks, sub-system and converters (with some guidance & support) within multi-block PMIC products
• Ensure design quality, robustness, and reliability through in-depth technical reviews
• Collaborate with internal systems and architecture teams to resolve integration challenges and drive technical closure
• Mentor and support junior engineers on design methodology, tools, and best practices

Minimum requirements:

• Bachelor's degree in Electrical Engineering or related field (Master's or PhD preferred)
• 4+ years of analog/mixed-signal IC design experience with strong analog fundamentals and design understanding for standard blocks including BGRs, V2Is, Amplifiers, Comparators, Level shifters, Oscillators
• Experience with high-voltage circuit designs and high speed level shifters
• Familiarity with SOA (Safe Operating Area) & Reliability, Aging sims
• Strong understanding of mismatch effects and device noise, with experience in auto-zeroing, chopping, and statistical analysis
• Good understanding of Control Systems fundamentals, compensation, large signal analysis etc.
• Fully proficient and deeply comfortable with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre)
• Worst-case corner analysis, top-level and Monte Carlo simulation, and post-layout PEX sign-off
• Strong knowledge of BCD and/or advanced CMOS process trade-offs for high-performance Power IC design
• Ability to work independently and drive design related technical decisions with confidence and provide predictable development schedule for blocks & sub-systems based on the specifications, with high quality.
• Should be able to independently explore multiple options and come up with optimum architectures of blocks for given specs and execute with high quality while adhering to the schedules.
• Strong written and verbal communication skills

Preferred qualifications:

• Experience in designing blocks for PMICs in consumer electronics (mobile, laptops, wearables)
• Understanding of one or more converter control architectures: Adaptive/Constant On/Off Time, peak/valley/average current mode control
• Hands-on transistor-level design of integrated power FETs, gate drivers, oscillators, bandgap/bias circuits, error amplifiers, and frequency compensation networks
• High-efficiency design techniques with focus on performance while minimizing power and area.
• Working familiarity with multi-rail PMIC SoC integration: power sequencing, UVLO, OCP, OTP, and digital interfaces (I2C, SPI, MIPI I3C)
• Experience in customer-facing technical alignment and specification negotiation
• Physical layout understanding and key aspects including power routing, grounding, signal integrity, thermal management, and die area optimization
• Exposure to Simplis, AMS, or equivalent simulation tools (good to have)
• Experience of full / partial design ownership of Switching Converters, LDOs
• Full-cycle IC design experience: schematic, simulation, layout collaboration, post-layout verification, silicon validation, and characterization
• Ability to independently manage and execute multiple design tasks in parallel on aggressive schedules
• Mentoring Junior members and New College Graduates in the team