Physical Design Engineer

Cerebras Systems, Inc.; India; On-site; INR 2,000,000 - 3,000,000; Full time

Job summary

Cerebras Systems, Inc. is seeking a world-class physical design engineer in India. In this role, you will perform tasks in synthesis, place and route, and work closely with RTL for full-chip integration. This position requires 7+ years of experience in physical design and a strong capacity to learn and grow.

The environment is dynamic and supportive, fostering continuous learning and team collaboration. Join us to help shape the future of AI computing technology!

Qualifications

• 7+ years of physical design/verification experience.
• Strong ability to learn and grow with the team.
• Demonstrated ability to work with RTL teams.

Responsibilities

• Perform a variety of physical design tasks such as synthesis and place and route.
• Work closely with the RTL team on full-chip integration of blocks.
• Take on a leadership role after ramping up on wafer scale design.

Skills

Physical design/verification experience

Block/subsystem timing closure

Optimizing for power/performance and area

Scripting languages like Tcl and Python

Tools

Synopsys tool suite

ICV or Calibre tools

Job description

About The Role

As our team grows Cerebras is looking for a world class physical design engineer. We are looking for a strong learner who can learn how we do PD and integration of our wafer scale design. As a member of our tight knit physical design team, you will perform a variety of physical design tasks such as synthesis, place and route, timing and block closure / sign off. You will be involved in all aspects of physical design and implementation. You will work closely with the RTL team and with full-chip integration of these blocks.

Skills and Qualifications

• 7+ years of physical design/verification experience.
• Strong experience in block/subsystem timing closure.
• Strong ability to learn and grow with the team.
• Strong knowledge of block level and full-chip physical verification methodology.
• Expert at optimizing for the best power/performance and area.
• Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.
• Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.
• Expert with IR/EM analysis and resolution.
• Good understanding of full chip floor-planning and integration.
• Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.
• Demonstrated ability to work with RTL teams to optimize for physical design.
• Ability to take on a leadership role after ramping up on wafer scale design

Why Join Cerebras

1. Build a breakthrough AI platform beyond the constraints of the GPU.
2. Publish and open source their cutting-edge AI research.
3. Work on one of the fastest AI supercomputers in the world.
4. Enjoy job stability with startup vitality.
5. Our simple, non-corporate work culture that respects individual beliefs.

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around us.

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