Physical Design Engineer (Bengaluru)

Cerebras; India; On-site; INR 2,000,000 - 3,000,000; Full time

Benefits offered by this job

Job stability with startup vitality

Non-corporate work culture

Job summary

Cerebras is seeking a world-class Physical Design Engineer to join their team in India. The ideal candidate will have over 7 years of experience in physical design, with a focus on timing closure and full-chip verification.

This role involves diverse responsibilities, from synthesis to block closure, and requires strong scripting skills in Tcl and Python. The position offers a unique opportunity to work on cutting-edge AI technology and be part of a collaborative team culture.

Qualifications

• 7+ years of physical design/verification experience.
• Strong experience in block/subsystem timing closure.
• Strong knowledge of block level and full-chip physical verification methodology.

Responsibilities

• Perform various physical design tasks including synthesis, place and route.
• Work closely with RTL teams for full-chip integration.
• Take on a leadership role after ramping up on wafer scale design.

Skills

Physical design/verification experience

Timing closure

Knowledge of Synopsys tool suite

ICV or Calibre tools

Scripting languages (Tcl, Python)

Tools

Synopsys tool suite

ICV tools

Calibre tools

Job description

About The Role

As our team grows Cerebras is looking for a world class physical design engineer. We are looking for a strong learner who can learn how we do PD and integration of our wafer scale design. As a member of our tight knit physical design team, you will perform a variety of physical design tasks such as synthesis, place and route, timing and block closure / sign off. You will be involved in all aspects of physical design and implementation. You will work closely with the RTL team and with full-chip integration of these blocks.

Skills and Qualifications

• 7+ years of physical design/verification experience.
• Strong experience in block/subsystem timing closure.
• Strong ability to learn and grow with the team.
• Strong knowledge of block level and full-chip physical verification methodology.
• Expert at optimizing for the best power/performance and area.
• Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.
• Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.
• Expert with IR/EM analysis and resolution.
• Good understanding of full chip floor-planning and integration.
• Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.
• Demonstrated ability to work with RTL teams to optimize for physical design.
• Ability to take on a leadership role after ramping up on wafer scale design

Why Join Cerebras

1. Build a breakthrough AI platform beyond the constraints of the GPU.
2. Publish and open source their cutting-edge AI research.
3. Work on one of the fastest AI supercomputers in the world.
4. Enjoy job stability with startup vitality.
5. Our simple, non-corporate work culture that respects individual beliefs.

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around us.

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