Physical Design Engineer

Qualcomm; Dadri; On-site; INR 1,200,000 - 2,000,000; Full time

Job summary

Qualcomm India Private Limited is seeking an ASIC Engineer to define, model, and design IP across digital/analog blocks for high-performance, low-power SoCs. You will verify, implement, and document IP while collaborating with cross-functional teams to determine product execution paths.

Ideal candidates have 2+ years in hardware engineering and hands-on experience with PNR flows, floorplanning, CTS, and signoff domains on latest nodes. The role requires strong Linux/Unix and scripting skills.

Qualifications

• 2+ years hardware engineering experience or related work experience.
• 2+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm)

Responsibilities

• Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route, etc) on latest nodes.
• Signoff knowledge is mandatory (STA, Power analysis, FV, low power verification, PV, etc)
• Quick learner with good analytical and problem-solving skills

Skills

Hardware engineering

PNR flow

Floorplanning

Placement

CTS

Signoff domains

Unix/Linux scripting

Perl

TCL

Education

Bachelor's degree in Science, Engineering, or related field

Tools

Floorplanning tools

Placement/CTS tools

Signoff tools

STA tools

Job description

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field.

General Summary

• PNR implementation for Qualcomm SoC's
• Good hands-on experience on Floorplanning, PNR and STA flows
• Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
• Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc
• Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting

Principal Duties And Responsibilities

• Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route, etc) on latest nodes.
• Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV, etc)
• Quick learner with good analytical and problem-solving skills

Qualifications

• 2+ years Hardware Engineering experience or related work experience.
• 2+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.