PE Logic Design

Rambus; Bengaluru; On-site; INR 1,000,000 - 1,500,000; Full time

Job summary

Rambus, Bengaluru, India, seeks a Principal Design Engineer to join our PCIe IP design team. You will contribute to architecture and micro-architecture, prototype IPs on FPGAs, and collaborate with international teams. A strong RTL design background with Verilog/SystemVerilog and 8+ years of experience is required.

A Master’s or PhD in Electrical/Computer Engineering is preferred. The role is full-time with a competitive package and opportunities to work on next‑generation PCIe IP and memory

Qualifications

• 8+ years of RTL Design experience.
• Strong knowledge of Verilog/SystemVerilog.
• Good English communication and collaboration with international teams.

Responsibilities

• Contribute to the architecture and micro-architecture of next generation PCIe IP
• Implement these designs in System Verilog
• Collaborate with the verification team to verify the IPs
• Participate in prototyping of the IPs in cutting edge FPGAs
• Contribute to support of existing generations of the IPs

Skills

RTL Design

Verilog/SystemVerilog

Education

Master's or PhD in Electrical/Computer Engineering

Job description

Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Principal Design engineer to join our PCIe IP design team. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Principal Design engineer to join our PCIe IP design team. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

This full-time position will allow the candidate to contribute to the architecture, design of next generation IPs, targeting the latest developments in PCIe standards. This position will also be involved in prototyping these IPs on cutting edge FPGAs. The candidate will work closely with local teams as well as with multi-cultural, multi-national colleagues.

Responsibilities

• Contribute to the architecture and micro-architecture of next generation PCIe IP
• Implement these designs in System Verilog
• Collaborate with the verification team to verify the IPs
• Participate in prototyping of the IPs in cutting edge FPGAs
• Contribute to support of existing generations of the IPs

Qualifications

• RTL coding: Verilog / System Verilog
• Master's degree or PHD in Electrical Engineering, Computer Engineering or equivalent.
• 8 + years of experience with RTL Design
• Good English skills, communication skills, and willingness to work with an international team.

Additional Desirable Skills

• Knowledge of PCIe / CXL

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow's systems.

Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.

Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.

Rambus is proud to be an Equal Employment Opportunity and Affiant employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.