PE DFT

Rambus.com; Bengaluru; Hybrid; INR 4,500,000 - 7,500,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Rambus seeks a PRINCIPAL ENGINEER to lead DFT efforts for high-speed mixed-signal designs in Bangalore. You will own full DFT of mixed-signal designs, develop DFT IPs, and debug complex failures while collaborating with cross-functional teams across EDA and Test Engineering.

The role emphasizes scripting, flow deployment, and MBIST/LBIST understanding within a hybrid work setup with three days onsite and two remote days.

Qualifications

• 8–12 years of hands-on experience in Design for Test (DFT)
• Clear understanding of Scan compression (EDT), Scan Stitching, fault models (stuck-at, delay tests, Small Delay)
• Understanding of SOC DFT architecture and mixed-signal DFT basics
• Synthesis, RTL coding, STA concepts
• Hands-on experience with Tessent ATPG tool is preferable
• Proficiency in Perl, Python, TCL or Shell scripting
• Strong collaboration and problem-solving abilities

Responsibilities

• Full DFT of Mixed Signal design.
• Create DFT IPs and deployment.
• Debug different failures.
• Low coverage analysis for Stuck-at and At-speed.
• Collaborate with cross-functional teams to develop and verify DFT structures and constraints.
• Work with Test Engineering for test program development, silicon bring-up, yield improvement, silicon debug.
• Coordinate with EDA R&D to propose and implement new features.
• Hands-on scripting and flow deployment.
• Understand MBIST and LBIST.

Skills

DFT concepts

MBIST

LBIST

Scripting

Education

BTech/BE/ME/M Tech

Tools

Tessent ATPG

EDT

OCC

Synthesis

RTL coding

STA

Job description

Overview

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional DFT engineer to join our DFT team in Bangalore. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.

As a PRINCIPAL ENGINEER, you’ll play a pivotal role in Handling different aspects of DFT for high-speed mixed signal Design, Low coverage debug for Stuck at and Transition, Silicon debug, taking initiative to deploy new flow. Supporting team whenever needed. In this fulltime role, you’ll report directly to our Dir Engineering. Our MIC Design team is dedicated to delivering high quality PMIC silicon, and your contributions will be instrumental in leading project, performing DFT tasks with quality, and delivering high quality patterns for silicon.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities

• Full DFT of Mixed Signal design.
• Creating DFT IPs and deployment.
• Debug different failure.
• Low coverage analysis for both Stuck at and At-speed.
• Working closely with cross functional teams to develop and verify DFT’s structures and constraints.
• Work closely with Test Engineering for test program development, Silicon bring up, diagnosis, Yield improvement, Silicon Debug etc.
• Work closely with EDA R&D teams to propose and implement new features.
• Hands on skill for scripting and flow deployment.
• Understanding of MBIST, LBIST.

Qualifications

• BTech /BE/ME/M Tech with 8-12 years of relevant hands-on experience in Design for Test (DFT).
• Clear understanding of key DFT concepts like Scan compression (EDT), Scan Stitching, fault models (stuck-at, delay tests, Small Delay, etc.), EDT, OCC etc.
• Understanding of SOC DFT architecture.
• Basic understanding of DFT for mixed signal designs.
• Understanding of Synthesis, RTL coding, STA.
• Hands on experience with Tessent ATPG tool is preferable.
• Silicon debug skill and sign off.
• Experience in at least one scripting language like PERL, Python, TCL, or Shell is preferred.
• Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
• Excellent written and verbal communication skills.

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop thecutting-edgeproducts and technologies essential for tomorrow’s systems.

Rambus offers a competitive compensation package, including base salary, bonus,equityand employee benefits.

At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members haveequitableaccess to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all doourbest work.

Rambus is proud to be an Equal Employment Opportunity and Affi

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veteransduringour job application procedures. If yourequireassistanceoran accommodationdue to a disability,please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitmentagenciesor fee-based recruitment services.

For more information about Rambus, visit rambus.com. Foradditionalinformation on life at Rambus and our current openings, check outrambus.com/careers/.