PD Layout expert

Texas Instruments

Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

14 days+

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Competitive pay
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Job summary

Texas Instruments in Bengaluru is seeking a skilled individual with over 5 years of experience in physical design. Responsibilities include driving layout closure with Innovus and collaborating with multiple design teams to maintain design integrity.

The ideal candidate will have a thorough understanding of physical design principles and experience with advanced EDA tools. This position also emphasizes scripting skills to enhance flow automation and an interest in integrating AI/ML techniques.

Qualifications

  • 5+ years of relevant experience in physical design.
  • Thorough understanding of layout closure and design tools.

Responsibilities

  • Define and drive layout closure with Innovus.
  • Collaborate with teams to ensure design intent preservation.
  • Implement ECO for DRC and LVS fixes.

Skills

Physical design aspects
Scripting skills in TCL, Perl, or Python
Collaboration with design teams
AI/ML techniques

Tools

EDA tools

Job description

We are at a pivotal moment where technology is rapidly evolving, and we have some exciting opportunities within our MCU organization that place us right at the center of this transformation.

Our current work is focused on developing solutions for high-growth markets such as AI-driven data centers and emerging domains like humanoid systems. These areas are shaping the future of computing, automation, and intelligent systems, and offer a unique chance to work on cutting-edge technologies with real-world impact.

If you are passionate about solving complex technical challenges and want to contribute to innovations in these fast-growing segments, I encourage you to come forward and apply. This is an opportunity to be part of a journey that is not only technically rewarding but also strategically significant.

Looking forward to seeing many of you take this step.

Why TI?
  • Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.

  • We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012)

  • Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well‑being is important to us.

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.

If you are interested in this position, please apply to this requisition.

Minimum requirements
  • 5+ years of relevant experience

  • A thorough understanding of physical design aspects: Floorplan, Congestion analysis, DRC etc.

Preferred qualifications
  • Define and drive layout closure with in innovus and establish correlation with signoff.

  • Driving SoC layout (FP), Power-grid design, IR drop validation ensuring balanced design utilization, development.

  • Collaborate with timing, ATD, ESD and physical verification teams to ensure design intent is preserved.

  • Drive ECO (Engineering Change Order) implementation for DRC and LVS fixes.

  • Drive correct by construction approach (congestion, NDRs, early DRC/LVS) using advanced EDA tools and methodologies.

  • Driving SoC layout (FP), Power-grid design, IR drop closure ensuring balanced design utilization

  • Scripting skills in TCL, Perl, or Python for flow automation.

  • Interest in adopting AI/ML techniques along with flow automations

ECL/GTC Required

Yes

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