Package Device Product Engineer (PDPE) Engineer

303A Micron Semiconductor Technology India; Sanada; On-site; INR 700,000 - 900,000; Full time

Job summary

303A Micron Semiconductor Technology India is looking for a Package Device Product Engineer for its Package Development Engineering team. You will support new product development by performing data analysis and modeling, and ensuring test readiness throughout product lifecycles.

The ideal candidate should hold a degree in Engineering, preferably in Electronics or Device Physics, and have hands-on experience in electrical data analysis, programming proficiency, and strong analytical skills.

Qualifications

• Degree in Engineering, preferably in Electronics, Electrical Engineering, Device Physics, or Applied Physics.
• Hands-on experience in electrical data analysis and modeling.
• Excellent multitasking and organizational skills.

Responsibilities

• Enable new BE test signals to capture assembly-related failures.
• Analyze test failures and implement corrective actions.
• Participate in phase gate review meetings.

Skills

Electrical data analysis

Device physics

Programming in Python or Perl

Communication skills in English

Analytical skills

Education

Bachelor’s, Master’s, or M.Tech degree in Engineering

Tools

JMP

Job description

Package Device Product Engineer (PDPE) – Package Development Engineering (PDE) group, a global organization with teams in the United States, Singapore, Malaysia, China, Taiwan, and India. This role supports new DRAM, NAND, or managed NAND (mNAND) products by coordinating resources, test readiness, and analysis throughout the product lifecycle. You will perform data analysis and modeling, create and maintain root‑cause analysis documentation, analyze parametric, front‑end (FE) probe, and back‑end (BE) electrical test data, and respond to product failures.

Responsibilities

• Enable new BE test signals to capture assembly‑related failures.
• Collaborate with Test Solution Engineering (TSE) and Product Engineering (PE) to ensure standardized test coverage and characterization, define characterization limits, and approve test‑related changes.
• Develop and sustain new out‑of‑control action plans (OCAPs).
• Provide lot disposition recommendations based on parametric data observations when out‑of‑control (OOC) conditions are triggered.
• Ensure silicon and assembly processes meet product requirements by analyzing probe and BE test data.
• Participate in phase gate review meetings by presenting data analysis and supporting phase gate exit decisions related to electrical test data.
• Analyze test failures, coordinate EFA and PFA activities to identify root causes, and implement corrective actions related to fab process, design, or assembly process issues.
• Identify correlations between test failures and assembly processes, and update the database with observed signatures.
• Support global and local material review boards (MRB) during excursions and RMAs related to package‑intrinsic design, including electrical test data analysis for root‑cause analysis (RCA) and assessment of contained material health.

Requirements

• Bachelor’s, Master’s, or M.Tech degree in Engineering — preferably in Electronics, Electrical Engineering, Device Physics, or Applied Physics.
• Strong foundation in device physics and engineering statistics.
• Hands‑on experience in electrical data analysis and modeling (experience with JMP).
• Programming proficiency in Python or Perl.
• Excellent written and verbal communication skills in English.
• Strong analytical and problem‑solving abilities.
• Effective multitasking, organizational, and decision‑making skills, especially in complex environments.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail].