MTS – ASIC Device Technology & Silicon Yield Engineering

1840 Micron Tech. OP India LLP; Hyderabad; On-site; INR 4,500,000 - 7,000,000; Full time

Job summary

Micron Technology, Inc. in Hyderabad seeks a Senior Yield & Reliability Lead to own end-to-end investigations of silicon yield loss, field returns, and reliability failures.

You will drive root-cause analysis, containment, corrective actions, and prevention across process, design, test, package, and system interactions. Analyze device-level failure mechanisms, coordinate with foundries on process variations, and drive post-silicon debug and design/process improvements for SRAM, PCIe PHY, SerDes,

Qualifications

• Ph.D. or MS in EE, Materials Science, Physics or Semiconductor Engineering.
• 12+ years in semiconductor, with leadership in yield/RMA/failure analysis.
• Proven success with foundries/OSAT partners.

Responsibilities

• Lead end-to-end investigation of silicon yield loss, field returns, customer escalations, and reliability failures.
• Drive root-cause analysis for complex silicon issues spanning process, design, test, package, and system interactions.
• Develop hypothesis-driven debug strategies and coordinate multi-functional execution.
• Own resolution of critical yield and quality issues through containment, corrective actions, and prevention plans.
• Analyze device-level failure mechanisms and process sensitivities impacting ASIC functionality and yield.
• Partner with foundries to understand process variations, excursions, reliability risks, and technology limitations.
• Lead root-cause investigations involving design-process interactions affecting SRAM, PCIe PHY, ONFI interfaces, SerDes, analog/mixed-signal circuits, and high-speed subsystems.
• Drive post-silicon debug activities involving design teams, DFT, product engineering, quality, reliability, foundry, and customer support teams.
• Develop silicon characterization plans to isolate contributors and feed learning back into next-gen architectures.

Skills

CMOS device physics

Memory design fundamentals

SerDes

PCIe PHY

Post-silicon debug

Failure analysis

Education

Ph.D. or M.S. or equivalent in Electrical Engineering, Materials Science, Physics, Semiconductor Engineering

Tools

FIB/SEM

TEM

OBIRCH LVP

Job description

Key Responsibilities

Post-Silicon Yield & RMA Leadership

Lead end-to-end investigation of silicon yield loss, field returns, customer escalations, and reliability failures. Drive root-cause analysis for complex silicon issues spanning process, design, test, package, and system interactions. Develop hypothesis-driven debug strategies and coordinate multi-functional execution. Own resolution of critical yield and quality issues through containment, corrective actions, and prevention plans.

Device Technology & Process Interaction Analysis

Analyze device-level failure mechanisms and process sensitivities impacting ASIC functionality and yield. Evaluate design-process interactions affecting analog, mixed-signal, memory, high-speed I/O, and PCIe PHY performance. Partner with foundry teams to understand process variations, excursions, reliability risks, and technology limitations. Translate silicon learning into actionable design and process improvements.

Advanced ASIC Design Interaction & Silicon Debug

Lead root-cause investigations involving design-process interactions affecting SRAM, PCIe PHY, ONFI interfaces, SerDes, analog/mixed-signal circuits, and high-speed digital subsystems. Analyze silicon failures across transistor, circuit, block, die, package, and system levels. Drive post-silicon debug activities involving design teams, DFT, product engineering, quality, reliability, foundry, and customer support organizations.

Debug complex failure mechanisms including:

• SRAM single-bit and multi-bit failures
• Read/write margin failures
• Timing and voltage sensitivity issues
• PCIe PHY performance degradation
• Signal integrity and jitter-related failures
• Yield excursions linked to process variation
• Field-return and RMA failures

Develop silicon characterization plans to isolate process, design, and test-related contributors. Drive silicon learning feedback into next-generation ASIC architecture and design methodologies.

Failure Analysis & Physical Debug

Drive advanced FA activities including:

• FIB SEM/TEM
• EFA OBIRCH LVP Emission microscopy
• Physical cross-section analysis

Correlate failure signatures with design, process, and manufacturing data. Interpret FA results and convert findings into clear engineering actions.

Multi-functional Technical Leadership

Lead technical reviews with Product Engineering, DFT, Design, Reliability, Quality, Operations, Foundry, and external partners. Present complex technical findings to executive leadership. Influence design and technology roadmaps to improve future product robustness and yield learning.

Required Qualifications

Education: Ph.D. or M.S. or equivalent experience in: Electrical Engineering, Materials Science, Physics, Semiconductor Engineering

Related technical rigor. Experience: 12+ years of semiconductor industry experience. Strong background in advanced CMOS technology and silicon product development. Proven success leading yield improvement, RMA, and failure analysis efforts. Experience working directly with foundries and OSAT partners.

Technical Expertise

Deep understanding of CMOS device physics and advanced semiconductor process technologies. Strong expertise in SRAM architecture, memory design fundamentals, memory margin analysis, and failure mechanisms. Strong understanding of high-speed interface technologies including PCIe, ONFI, LPDDR, SerDes, and clocking architectures. Experience with post-silicon debug and characterization of complex ASIC devices. Expertise in process-design interaction analysis and variation-aware design methodologies.

Strong knowledge of:

• Signal Integrity (SI)
• Power Integrity (PI)
• Timing closure methodologies
• Device variability and mismatch analysis
• Reliability-induced failure mechanisms

Experience correlating:

• Wafer Acceptance Test (WAT)
• Electrical test data
• Yield data
• Reliability data
• Failure Analysis results
• Customer-return information

Preferred Qualifications

Experience supporting SSD controller, AI accelerator, networking, or high-performance compute ASICs. Expertise in PCIe PHY, SerDes, memory subsystem, or analog mixed-signal debug. Track record resolving field-quality issues visible to executive leadership and customers. Experience applying AI/ML tools for yield analytics, anomaly detection, and RCA acceleration. Experience mentoring engineering teams and driving multi-site technical investigations.

Success Metrics

Reduction in RMA investigation cycle time. Faster closure of silicon root-cause investigations. Yield improvement driven through systematic learning. Improved containment and corrective action effectiveness. Reduced repeat excursions through preventive actions. Increased multi-functional execution efficiency. Enhanced customer confidence through timely and technically sound issue resolution.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.