Manager- SoC Validation

Randstad Enterprise; Hyderabad; On-site; INR 4,500,000 - 6,000,000; Full time

Job summary

Randstad Enterprise in Hyderabad, India seeks an experienced validation leader to drive end-to-end silicon validation, including pre-silicon correlation, post-silicon functional validation, and ATE test development. You will collaborate with Design, DV, DFT, Product Engineering, and Quality teams to ensure production readiness.

You will lead global validation teams, define validation plans, and oversee wafer probe evaluation, characterization across PVT corners, and datasheet validation to

Qualifications

• 12–18+ years of SoC/System Validation, Characterization, or ATE experience.
• Experience across wafer probe, package test, system validation, and failure analysis.
• Ability to lead global validation teams and manage vendors.
• Strong debugging, data analysis, and test coverage planning skills.

Responsibilities

• Lead silicon bring-up and debug activities for complex SoCs.
• Own functional, subsystem, and system-level validation.
• Develop validation plans, test specifications, and coverage strategies.
• Drive customer use-case and scenario validation.
• Define and execute silicon characterization plans across PVT corners.
• Characterize timing, performance, power, thermal, and analog parameters.
• Correlate silicon measurements against simulation models and specifications.
• Generate characterization reports for product release and datasheet validation.

Skills

SoC validation

System validation

Characterization

ATE

Wafer probe

PVT characterization

Test plan development

Root cause analysis

Tools

DFT tools

Bench/test equipment

Job description

Lead and manage end-to-end silicon validation activities spanning pre-silicon correlation, post-silicon functional validation, system validation, bench characterization, wafer probe evaluation, and ATE test development. Drive silicon quality, yield improvement, characterization, and production readiness while collaborating with Design, DV, DFT, Product Engineering, ATE, Applications, Firmware, and Quality teams. This enhancement aligns with responsibilities reflected in internal validation and evaluation materials.

Key Responsibilities:

• Lead silicon bring-up and debug activities for complex SoCs.
• Own functional, subsystem, and system-level validation.
• Develop validation plans, test specifications, and coverage strategies.
• Drive customer use-case and scenario validation.
• Perform stress, reliability, concurrency, and corner-case validation.
• Define and execute silicon characterization plans across PVT (Process, Voltage, Temperature) corners.
• Characterize timing, performance, power, thermal, and analog parameters.
• Correlate silicon measurements against simulation models and specifications.
• Analyze silicon variation and identify design/process-related issues.
• Generate characterization reports for product release and datasheet validation.

Wafer Probe / CP Evaluation

• Manage wafer-level electrical characterization and evaluation.
• Drive correlation between wafer probe, package test, and system validation results.
• Analyze yield excursions and process-related failures.
• Support DFT and Product Engineering teams in test coverage improvement.
• Develop screening methodologies and guard-band recommendations.

ATE Validation

• Collaborate with DFT and Product Engineering teams on ATE strategies.
• Review and optimize wafer sort and final test coverage.
• Validate production test programs and characterization limits.
• Drive ATE correlation with bench and system-level measurements.
• Support yield ramp, test time optimization, and cost reduction initiatives.

Leadership & Program Management

• Lead global validation teams and vendor resources.
• Manage schedules, resource planning, risk assessment, and execution.
• Mentor engineers in debug, characterization, and validation methodologies.
• Drive root-cause analysis and cross-functional issue resolution.

Qualifications:

12–18+ years in SoC/System Validation, Characterization, Product Engineering, or ATE domains.

Required Skills & Experience

12–18+ years in SoC/System Validation, Characterization, Product Engineering, or ATE domains.

Experience across the complete silicon lifecycle:

• Wafer Probe (CP)
• Package Test / Final Test
• System Validation
• Customer Support & Failure Analysis

SoC Validation Expertise

• SoC bring-up and silicon debug
• Functional and system validation
• Use-case and scenario validation
• Subsystem validation
• Stress and reliability testing
• Coverage planning and closure
• PVT characterization
• Timing and performance measurements
• Power and thermal characterization
• Analog and mixed-signal evaluation
• Correlation analysis

Wafer Probe & Product Engineering

• Yield analysis and yield improvement
• Parametric characterization
• Screening and guard-banding techniques
• Failure analysis flow

ATE Expertise

• Wafer sort and final test programs
• Test coverage analysis
• Correlation between ATE, Bench, and System results