Lead Engineer (IP Design & Microarchitecture)

Siemens AG

Dadri

On-site

INR 4,000,000 - 5,600,000

Full time

14 days+

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Benefits offered by this job

Bonus scheme
Private healthcare
Pension
Generous holiday allowance

Job summary

Siemens EDA is hiring a Hardware Accelerator Designer in India to derive architecture and micro‑architecture decisions and implement low‑power accelerators using high‑level synthesis.

The role collaborates with algorithm architects, tests and optimizes IPs for PPA, and ensures latency, throughput, area, and power targets are met throughout the ASIC/FPGA design cycle.

Qualifications

  • 5–10 years of experience in RTL design (Verilog, SystemVerilog, digital microarchitecture).
  • Bachelor’s, Master’s, or PhD with 6 years of relevant experience preferred.
  • Proven ability to break down DSP algorithms into micro/RTL architecture while managing cost and quality trade‑offs.
  • Proficiency in C/C++/Python/Bash programming.
  • Experience with High‑Level Synthesis (HLS) for ASICs or FPGAs is a plus.

Responsibilities

  • Develop, test, maintain, and improve IPs for optimal Power, Performance, and Area (PPA).
  • Implement functionality in SystemC/C++ and ensure designs meet latency, throughput, area, and power goals.
  • Perform power, area, and performance trade‑off analyses to identify efficient solutions.
  • Leverage HLS to rapidly iterate and evaluate multiple implementations.
  • Drive coverage closure and meet sign‑off criteria for IPs in a high‑level design/verification env.
  • Author detailed design documents outlining architectural choices.

Skills

RTL design
Digital microarchitecture
C/C++/Python/Bash
High-Level Synthesis (HLS)
Processor architecture
Full ASIC design cycle

Education

Bachelor's/Master's/PhD in EE/CS

Tools

SystemC
HDL (Verilog/SystemVerilog)
HLS tooling

Job description

Job Family: Software

Req ID: 509390

Siemens EDA is a global technology leader in Electronic Design Automation (EDA) software. Our innovative tools empower companies worldwide to develop highly advanced electronic products faster and more cost‑effectively. We're pushing the boundaries of technology and physics, enabling our customers to deliver superior products in the increasingly complex world of chip, board, and system design.

Role Overview

As a Hardware Accelerator Designer, you'll collaborate with algorithm architects and a talented team of designers, deriving architecture and micro‑architecture decisions, and implementing and optimizing algorithms into low‑power custom hardware accelerators using high‑level synthesis methodologies.

What you’ll do:
  • Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA).
  • Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals.
  • Perform comprehensive power, area, and performance trade‑off analyses to identify the most efficient solutions.
  • Leverage High‑Level Synthesis (HLS) to rapidly iterate and evaluate a wide range of possible implementations, narrowing down to the best‑suited version.
  • Drive coverage closure and meet all other sign‑off criteria for IPs within a high‑level design and verification environment.
  • Author detailed design documents that clearly articulate your architectural and implementation choices.
What you’ll bring:
  • 5–10 years of experience in RTL design (Verilog, SystemVerilog, digital microarchitecture).
  • A Bachelor’s, Master’s, or PhD degree with 6 years of relevant experience is preferred.
  • Proven experience in breaking down complex digital signal processing algorithms into micro/RTL architecture, while effectively managing cost and quality trade‑offs.
  • Proficiency in coding with C/C++/Python/Bash.
  • Experience with High‑Level Synthesis (HLS) for ASICs or FPGAs is a significant advantage.
  • Knowledge of basic processor architecture.
  • Experience with the full ASIC design cycle (from specification through bring‑up) is preferred.

We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare.

We are dedicated to equality and welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need.

Organization: Digital Industries

Job Type: Full‑time

Category: Research & Development

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