Formal Verification Engineer

Intel; Bengaluru; Hybrid; INR 1,500,000 - 2,100,000; Full time

Job summary

Intel is seeking a Formal Verification Engineer for the Silicon Chassis team in Bengaluru, India. You will apply advanced formal methods to rigorously verify interconnect fabrics, protocol bridges, and link-layer logic, driving end-to-end formal verification processes across multiple protocol domains.

You will collaborate with architecture, design, and software teams to ensure reliable, high-quality silicon solutions while shaping verification tools and methodologies for scalable workflows.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or related field; 4+ years in formal verification, or Master's 3+ years, or PhD with no experience.
• Proficiency in formal verification tools and methodologies, including model checking and equivalence checking.
• Strong knowledge of System Verilog, Verilog, and fundamentals of logic/microarchitecture.
• Experience with abstraction modeling, simulation techniques, and convergence strategies.
• Familiarity with Binary Decision Diagrams (BDD) and Data Flow Graphs (DFG).

Responsibilities

• Develop and execute formal verification test plans, including defining scope, strategies, and methodologies.
• Create abstraction models to facilitate convergence on complex designs and apply abstraction techniques for formal analysis.
• Generate and validate proofs to verify designs, troubleshoot failing tests, and implement corrective measures.
• Collaborate across architecture, RTL design, and physical implementation teams to improve verification accuracy for advanced features.
• Maintain and enhance formal verification tools, methodologies, and infrastructure for optimized workflows.
• Simplify and model design verification challenges using architecture-level modeling techniques.
• Utilize formal verification tools to resolve Binary Decision Diagrams (BDD) complexities and optimize data paths.
• Document verification plans, track progress, and lead technical reviews with cross-functional teams.

Skills

Formal verification

SystemVerilog

Verilog

Abstraction modeling

Convergence strategies

Data Flow Graphs

Binary Decision Diagrams

Education

Bachelor's degree in Electrical Engineering/Computer Science or related field

Master's degree in a relevant field

PhD in a related field

Tools

Model checking tools

Equivalence checking tools

Verilog tooling

Job description

Job Details

Job Description:

The Role and Impact

Intel is seeking a Formal Verification Engineer for the Silicon Chassis team. In this role, you will apply advanced formal methods to rigorously verify interconnect fabrics, protocol bridges, and link-layer logic. You will drive end-to-end formal verification processes, including property specification and proof convergence across multiple protocol domains. Through close collaboration with architecture, design, and software teams, your work will ensure the delivery of high-quality, cutting-edge solutions.

Business Group

The Central Engineering Group (CEG) focuses on enabling technology innovation across Intel by delivering robust engineering solutions and methodologies. As part of this group, the UIC Validation Transport team plays a critical role in supporting Intel's broader goals of advancing silicon development. By leveraging formal verification techniques, this team ensures the reliability and performance of foundational technologies used in Intel's products worldwide.

Key Responsibilities

• Develop and execute formal verification test plans, including defining scope, strategies, and methodologies.
• Create abstraction models to facilitate convergence on complex designs and apply abstraction techniques for formal analysis.
• Generate and validate proofs to verify designs, troubleshoot failing tests, and implement corrective measures.
• Collaborate across architecture, RTL design, and physical implementation teams to improve verification accuracy for advanced features.
• Maintain and enhance formal verification tools, methodologies, and infrastructure for optimized workflows.
• Simplify and model design verification challenges using architecture-level modeling techniques.
• Utilize formal verification tools to resolve Binary Decision Diagrams (BDD) complexities and optimize data paths.
• Document verification plans, track progress, and lead technical reviews with cross-functional teams.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or a related field, with 4+ years of professional experience in formal verification OR Master's degree in a relevant field, with 3+ years of experience OR PhD with no prior professional experience.
• Proficiency in formal verification tools and methodologies, including model checking and equivalence checking.
• Strong knowledge of System Verilog, Verilog, and fundamentals of logic/microarchitecture.
• Experience with abstraction modeling, simulation techniques, and convergence strategies.
• Familiarity with Binary Decision Diagrams (BDD) and Data Flow Graphs (DFG).

Preferred Qualifications

• Proven ability to resolve complex architectural and formal verification challenges.
• Strong collaboration and teamwork skills, with experience in cross-functional environments.
• Exceptional technical documentation and communication abilities.
• Enthusiasm for driving innovation and improving verification tools and methodologies.

Join us in shaping the future of computing technology with Intel by contributing to groundbreaking advancements in the field of formal verification.

Job Type

Experienced Hire

Shift

Shift 1 (India)

Primary Location

India, Bangalore

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.