Emulation Engineer

HCLTech; Hyderabad, Chennai District, Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

HCLTech seeks an experienced Senior Emulation Validation Engineer to drive pre-silicon validation and customer co-emulation for next‑gen SoC platforms. You will collaborate with architecture, design, validation, and customer teams to enable large-scale emulation environments and accelerate feature validation.

Responsibilities include bringing up emulation environments, validating CoH/MIO/IOMMU paths, and developing automation to improve efficiency.

Qualifications

• Proficient in SoC validation and emulation.
• Experience with emulation platforms and debug.
• Strong scripting and automation skills.

Responsibilities

• Bring up and debug emulation environments for complex SoCs.
• Execute and validate use cases including CoH, MIO/IOMMU, security features.
• Enable customer co-emulation and support debug activities.
• Drive test planning, execution, coverage closure, and root-cause analysis.
• Collaborate with RTL, firmware, architecture, and model-build teams.
• Develop automation and debug tools to improve validation efficiency.
• Analyze failures and coordinate fixes with design teams.

Skills

SoC architecture

SystemVerilog/UVM

Python/Perl/Shell

Debugging & problem solving

PCIe/CXL/IOMMU/memory subsystems

Security protocols

Tools

ZeBu

Palladium

Veloce

Job description

Job Title : Senior Emulation Validation Engineer

Role Overview

We are seeking an experienced Emulation Engineer to drive pre-silicon validation and customer co-emulation activities for next-generation SoC platforms. The candidate will work closely with architecture, design, validation, and customer teams to enable large-scale emulation environments and accelerate feature validation.

Experience

• 5+ years in Design Verification, Emulation Validation at SoC level

Key Responsibilities

• Bring up, and debug emulation environments for complex SoCs.
• Execute and validate use cases involving:
  • Coherency (CoH)
  • MIO and IOMMU coherent paths
  • Security features such as Trusted P2P and Secure ATS
  • Core validation and platform-level functionality
• Enable customer co-emulation and support critical debug activities.
• Drive test planning, execution, coverage closure, and root-cause analysis.
• Collaborate with RTL, firmware, architecture, and model-build teams.
• Develop automation and debug tools to improve validation efficiency.
• Analyze failures and work with design teams to drive fixes.

Required Skills

• Strong understanding of SoC architecture
• Experience with hardware emulation platforms (ZeBu, Palladium, Veloce, or equivalent).
• Proficiency in SystemVerilog/UVM-based verification methodologies.
• Experience with PCIe, CXL, cache coherency, IOMMU, memory subsystems, or security protocols.
• Scripting expertise in Python, Perl, or Shell.
• Strong debugging and problem-solving skills