DFT Principal Engineer

onsemi; Bengaluru; On-site; INR 5,500,000 - 7,500,000; Full time

Job summary

OnSemi in Bengaluru, India, seeks a Principal Physical DFT Engineer for New Product Development in Power Management. This role leads DFT for PMIC/LED drivers and defines timing constraints for scan modes, performing pattern simulations with zero delay and SDF.

The candidate must excel in RTL design, Verilog, TCL, and Python/XML, with a proven track record of releasing complex ICs to market and improving PPA through robust debugging and cross-functional collaboration.

Qualifications

• BS or MS with extensive digital design and ASIC/mixed-signal experience.
• Strong RTL design, CDC, ASIC synthesis, timing analysis, CDC, P&R, UPF.
• Proficiency in Verilog, TCL and Perl/Python/XML.
• Proven track record releasing complex ICs to market.
• Excellent written and verbal cross-functional communication.
• Ability to articulate issues, challenges, and concerns to management.

Responsibilities

• Lead DFT with Scan implementations (Stuck-At, MBIST, iJTAG, BSCAN).
• Provide timing constraints for scan modes.
• Pattern simulation with zero delay and SDF.
• Coverage analysis and improvement suggestions to design.
• Low power issues fix post DFT implementation.
• Post silicon debug.
• Solid understanding of Verilog, TCL and Python/XML programming languages.
• Strong problem solving with deep technical understanding.
• Improve flow and methods to positively impact PPA.

Skills

RTL design

CDC

ASIC/MPD development

Verilog

TCL

Python/XML scripting

Cross-functional communication

Education

BS in Electrical Engineering + 12 years experience

MS + 11 years experience in Digital Design/ASIC

Tools

Verilog

TCL

Perl/Python/XML

Job description

Job Description

OnSemi is seeking a Principal Physical DFT Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications.

Responsibilities

• DFT Lead with expertise various Scan implementation like Stuck-At, MBIST, iJTAG, BSCAN, Transition, bridge faults
• Providing timing constraints for scan modes
• Pattern simulation with zero delay and SDF
• Coverage analysis and improvement suggestions to design
• Low power issues fix post DFT implementation
• Post silicon debug
• Solid understanding of Verilog, TCL and Perl/Python/XML programming languages
• Strong in problem solving with deep understanding of technical issues.
• Candidate should have keen eye to improve existing flow and methods with positive impact on PPA.

Qualifications

• BS in Electrical Engineering or related + 12 years of experience, or MS + 11 years of experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments
• Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF
• Solid understanding of Verilog, TCL and Perl/Python/XML programming languages
• Solid track record of releasing complex ICs to market
• Ability to clearly articulate issues, challenges, and concerns to all levels of management
• Must have good written and verbal cross-functional communication skills

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits