DFT Integration Lead

AMD; Bengaluru Urban; On-site; INR 2,000,000 - 3,200,000; Full time

Benefits offered by this job

AMD Benefits

Job summary

AMD in Bengaluru, India is hiring a Senior SMTS DFT Design Engineer to own the DFT design and integration for cutting-edge ASICs. You will collaborate with DFT Architecture and RTL teams to implement robust DFT flows.

The role requires 11+ years in DFT, strong scripting (Perl/Python/TCL), experience with Tessent, Design Compiler, Spyglass, and post-silicon debug. Excellent communication and problem-solving are essential.

Qualifications

• Experience and understanding of ASIC DFT, synthesis, simulation and verification flow.
• End-to-End DFT flow development/creation.
• RTL development using Verilog/SystemVerilog for IP/SoC integration.
• Experience with RTL quality checks (Spyglass, CDC, Lint).
• Integration of multiple IPs into complex SOCs.
• Exposure to Static timing analysis & timing closure.

Responsibilities

• Own/lead the DFT design and integration for cutting edge DFT structures.
• Perform DFT design development, data analysis and silicon debug of DFT in leading process technologies.
• Collaborate with RTL designers, Verification Engineers, and PD team to accelerate defect identification.

Skills

Communication skills

Problem solving

Self-driving ability

Education

BE/BTech/ME/MTech in Electrical/Electronics Engineering

Tools

Perl

Python

TCL

Tessent

Design Compiler

Spyglass

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

SMTS DFT Design Engineer

THE ROLE:

• As a member of the S3 SoC DFx Team, the successful candidate will own/lead the DFT Design and Integration of cutting edge DFT structures including SCAN, ATPG, MBIST, BSCAN.
• Position includes DFT design development, data analysis and silicon debug of DFT in leading process technologies.
• Strong self-driving ability, should have excellent communication skills (both written and oral)
• Strong problem-solving skills

KEY RESPONSIBILITIES:

• Working closely with the DFT Architecture and the various IP Design teams to align on the DFT requirements and successfully implementing the DFT design
• Design and develop correct by construction DFT design and support DFT verification
• Working closely with the RTL designers, Verification Engineers, and PD team to find creative ways to accelerate the identification of functional defects.

PREFERRED EXPERIENCE:

• Experience and an understanding of ASIC DFT, synthesis, simulation and verification flow
• Experience is End-to-End DFT flow development/creation.
• Expert in Perl, Python, TCL, and ability to create complex flows/scripts.
• Strong EDA tools experience (Tessent, Design Compiler, Spyglass,)
• Experience in DFT architecture for complex chips
• Experience in RTL development using Verilog/System Verilog having worked on RTL for IP and SoC integration
• Proficient in doing basic unit-level verification using simulations.
• Experience with RTL quality check tools/methodologies such as Spyglass, CDC, Lint is required.
• Must have experience with integration of various IPs into complex SOCs.
• Exposure to Static timing analysis & Timing closure is required.
• Scan/ATPG patterns & test flows development, debug, test, and characterization
• Excellent hands-on debug skills and scripting skills are critical.
• Must have good communication skills and the ability to work in a worldwide team environment.
• Knowledge & experience of low power concepts, clock gating, power gating is a plus
• Experience with post-silicon bring up is a plus

ACADEMIC CREDENTIALS:

• B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering
• 11+ years’ experience in DFT Design

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.