DDR STA/Timing Engineer (Staff/ Senior Staff)

Qualcomm; Bengaluru; On-site; INR 2,000,000 - 4,000,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Hardware Engineer to plan, design, verify, and test electronic systems, including digital/analog/RF/optical components, packaging, and test systems. You will conduct STA, timing convergence, and signoff across multiple technology nodes to meet stringent performance targets.

Proficiency in scripting (TCL/Perl/Python) and hands-on experience with PrimeTime, Tempus, and industry back-end tools is required, along with collaboration in a cross-functional

Qualifications

• Bachelor’s degree in CS/EE with 2+ years hardware engineering experience.
• Master’s in CS/EE with 1+ year hardware experience.
• PhD in CS/EE/Engineering related field.

Responsibilities

• STA setup, convergence, and signoff for multi-mode designs.
• Timing analysis and validation across PVT with PT/Tempus.
• Run PrimeTime/Tempus for STA optimization and spice correlation.
• Evaluate timing methodologies/tools across designs.
• Develop automation scripts for STA/PD workflows.
• Document technical work and communicate across teams.

Skills

STA timing analysis

Digital/Analog/RF/optical systems

RTL to GDS flow

Scripting: TCL/Perl/Python

Cross-functional collaboration

Device physics basics

Timing methodology evaluation

Education

B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI

Tools

PrimeTime

Tempus

ICC2

Innovus

Hspice

FineSim

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next‑generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring‑up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting‑edge, world class products. Qualcomm Hardware Engineers collaborate with cross‑collaborative environment to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Responsibilities:

• STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.
• Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.
• Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.
• Evaluate multiple timing methodologies/tools on different designs and technology nodes.
• Work on automation scripts within STA/PD tools for methodology development.
• Good Technical writing and Communication skills, should be willing to work in cross‑collaborative environment
• Experience in design automation using TCL/Perl/Python.
• Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus
• Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo.

Education :

B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI.

Preferred Qualification/Skills

• 7 to 13 years of experience in STA/Timing
• Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
• Hands‑on experience with STA tools - Prime-time, Tempus
• Have experience in driving timing convergence at Chip-level and Hard‑Macro level
• In‑depth knowledge cross‑talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling,
• Knowledge of ASIC back‑end design flows and methods and tools (ICC2, Innovus)
• Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation.
• Proficient is scripting languages – TCL, Perl, Awk
• Basic knowledge of device physics

Applicants:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.