CPU Design Verification Sr Engineer

Qualcomm; Bengaluru; On-site; INR 12,00,000 - 20,00,000; Full time

Job summary

A leading company in the semiconductor industry is looking for strong DV engineers to verify high-performance CPUs. This role involves working on power management verification, developing test plans, and collaborating closely with design and verification teams. Ideal candidates will have a background in Electrical Engineering or Computer Science with experience in C/C++ and power management techniques.

Qualifications

• 3+ years of Hardware Engineering experience.
• Strong understanding of CPU power management features.
• Experience in verification methodologies like UPF.

Responsibilities

• Verify power management including boot, reset, clock gating.
• Use simulation and formal verification methodologies.
• Collaborate with design and software teams.

Skills

Power Management Verification

C/C++

Scripting Languages

Verilog/System Verilog

Debugging

Education

Bachelor's degree in Computer Science or Electronics Engineering

Master's or PhD in relevant fields

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement.

Roles and Responsibilities

o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling.

o Work closely with design/verification teams within CPU to develop comprehensive test plan.

o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus.

o Verify power intent through use of methodologies like UPF.

o Work closely with system architects, software teams and Soc team to validate system use cases.

o Work closely with emulation team to enable verification on emulators and FPGA platforms.

o Debug and triage failures in simulation, emulation and/or Silicon.

• Additional Job Description

  o BE/BTech degree in CS/EE with 3+ years’ experience.

  o Experience in power management verification.

  o Implementation of assembly and C language embedded firmware.

  o Experience in C/C++, scripting languages, Verilog/system Verilog.

  o Strong understanding of power management features in CPUs and CPU based Socs.

  o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc.

  Preferred Requirements:

  o Good Understanding of CPU architectures and CPU micro-architectures.

  o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture

  o Experience with advanced verification techniques such as formal and assertions is a plus

  o Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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