BIOS Developer

Capgemini; Chennai; Hybrid; INR 1,200,000 - 2,100,000; Full time

Benefits offered by this job

Hybrid work options

Learning & certifications in emerging技

Access to Capgemini global engineering

Job summary

Capgemini Engineering is seeking an experienced Coreboot/FSP engineer in Chennai to contribute to porting coreboot to new mainboards and optimizing boot flows. You will read hardware specs to map CPU/APU requirements and work with payloads like SeaBIOS and Tianocore to ensure smooth OS handoff.

You will collaborate with hardware, firmware, and software teams, bringing brings-up across diverse customer platforms, and supporting build tools for coreboot environments in a hybrid work model.

Qualifications

• Experience in coreboot/FSP development for x86 systems.
• Knowledge of x86 CPU/APU architectures and build tools.
• Experience with platform bring-up and board bring-up cycles.
• Familiarity with coreboot boot stages, UPDs, memory map, FSP, device tree, and payload handoff.

Responsibilities

• Develop and port coreboot/FSP to target mainboards.
• Analyze hardware specs to port OS boot flows.
• Work with payloads such as edk2/SeaBIOS/Tianocore for booting.
• Collaborate with cross-functional teams to ensure successful platform bring-up.

Skills

Coreboot/FSP development

x86 CPU/APU architectures

Platform bring-up

Coreboot boot stages & payloads

I2C/PCIe/SPI/eSPI/ACPI/SMM

Job description

Job Description:

Job Description

Choosing Capgemini means choosing a place where you’ll be empowered to shape your career, supported by a collaborative global community, and inspired to reimagine what’s possible. Join us for unlocking the value of technology and drive scalable, sustainable growth.

Your Role

• Experience on working with Intel FSP package source code and understanding of coreboot & FSP boot flow.
• Understanding of coreboot & FSP build tools and build processes.
• Experience of working with different coreboot payloads like edk2, SeaBios, Tianocore etc.
• Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required.

Your Profile

• 4 years To 10 years of experience in the x86 coreboot/FSP/BIOS development.
• Experience with x86 CPU/APU architectures and associated compilation tools.
• Experience with platform bring-up.
• Familiar with coreboot boot stages, UPDs, memory map, FSP, device tree concept, payloads to OS bootloader handoff.
• Working experience of industry standard protocols such as I2c, PCIe, SPI, eSPI, ACPI, SMM.
• Experience on working with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms.

What You’ll Love About Working Here

We value flexibility and support our employees with hybrid work options and adaptable schedules to maintain a healthy work-life balance. Our inclusive culture brings together diverse professionals committed to growth, innovation, and excellence. You’ll have access to continuous learning opportunities and certifications in emerging technologies like cloud and AI.

About Us

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as theyprovide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days arethe same. Capgemini is a global business and technology transformation partner, helping organizations accelerate their dual transformation to address the evolving needs of customers and citizens. With a strong 55-year heritage and deep industry expertise.