ASIC Engineer, SoC Architect

Meta; Bengaluru; On-site; INR 6,75,000 - 9,00,000; Full time

Job summary

An established industry player is seeking an ASIC Engineer, SoC Architect to join their innovative team. This role focuses on designing and optimizing ASICs to meet stringent performance, power, and area requirements. You will engage in various tasks including RTL design, synthesis, and collaboration with verification engineers to ensure functionality. If you have a passion for semiconductor technologies and enjoy working on complex projects, this opportunity will allow you to make significant contributions in a dynamic environment, enhancing your career in the cutting-edge field of ASIC design.

Qualifications

• Strong experience in ASIC design and RTL coding using Verilog or VHDL.
• Proficiency in low-power design techniques and synthesis optimization.

Responsibilities

• Collaborate with teams to define ASIC project goals and design requirements.
• Implement and optimize ASIC designs while ensuring performance and power targets.

Skills

Verilog

VHDL

ASIC Design

Low-Power Design

Synthesis and Optimization

Documentation

Education

Bachelor's Degree in Electrical Engineering

Master's Degree in Computer Engineering

Tools

ASIC Design Tools

Job description

Posted: 30+ days ago Openings: 1 Applicants: Less than 10

Meta is looking for an ASIC Engineer, SoC Architect to join our dynamic team and embark on a rewarding career journey. Your role involves working on complex projects and ensuring that ASICs meet performance, power, and area requirements.

Key Responsibilities:

1. Design Planning: Collaborate with cross-functional teams to define project goals, scope, and design requirements for ASIC projects. Establish design plans, including specifications, milestones, and budgets.
2. Architecture and Microarchitecture: Create architectural and microarchitectural specifications for ASIC designs, outlining high-level structure and functionality.
3. RTL Design: Implement ASIC designs using hardware description languages (HDL) such as Verilog or VHDL. Develop and optimize RTL (Register Transfer Level) code for logic design.
4. Synthesis and Optimization: Perform synthesis and optimization to ensure the ASIC design meets performance, power, and area targets. Work on clock domain crossing, power management, and timing closure.
5. Verification Support: Collaborate with ASIC Verification Engineers to develop and implement testbenches and test scenarios to validate ASIC functionality. Debug and resolve design issues identified during verification.
6. DFT (Design for Test): Implement DFT features, such as scan chains and boundary scan, to facilitate efficient testing of the ASIC.
7. Low-Power Design: Optimize ASIC designs for low-power operation, including clock gating, voltage scaling, and power gating.
8. Physical Design Support: Work with physical design and layout teams to ensure proper floor planning and placement of ASIC components.
9. Documentation: Maintain comprehensive and well-organized documentation of design specifications, RTL code, and design decisions.
10. Technology and Tool Awareness: Stay updated on semiconductor technologies, ASIC design tools, and industry best practices to enhance design processes.
11. Collaboration: Collaborate closely with cross-functional teams, including verification, software, and project management, to achieve project goals.