Apprentice Technical Engineer

Talentd; Bengaluru; Hybrid; INR 223,000 - 357,000; Full time

Job summary

Synopsys is offering an apprenticeship in Bengaluru, India to learn semiconductor characterization by running transistor-level simulations on digital standard cells. You will analyze circuit behavior, help validate standard cell libraries, and document findings for senior engineers.

This structured program emphasizes Liberty format knowledge, STA, and low-power design within production-quality flows. The 12-month apprenticeship is based in Bengaluru with 4–5 days in office, full-time employment,

Responsibilities

• Run transistor-level simulations on digital standard cells using industry-standard circuit simulators to extract timing, power, and leakage data across PVT corners.
• Analyze CMOS circuit behavior at the transistor level, reviewing schematics, debugging simulation failures, and identifying issues in logic implementation or device models.
• Support characterization and validation of standard cell libraries by running automated flows, reviewing results, and flagging anomalies or quality issues.
• Document simulation results, technical findings, and circuit-level observations in clear, structured reports that senior engineers can act on.
• Collaborate with library development engineers to improve characterization methods, refine automation scripts, and close gaps in coverage or accuracy.
• Learn and apply concepts from Liberty (.lib) format, Static Timing Analysis, and low-power design as you work through real library development cycles.
• Take part in technical reviews and team discussions to see how characterization fits into the wider semiconductor design and IP development process.

Job description

Job Description

Alternate Job Titles:

• VLSI Characterization Apprentice
• Standard Cell Library Development Apprentice
• CMOS Circuit Simulation Apprentice
• Digital Library Characterization Trainee
• Semiconductor Characterization Trainee

Who We Are

Synopsys is the leader in engineering solutions from silicon to systems, helping customers quickly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We work closely with customers across many industries to maximize their R&D capability and productivity.

Who You Are

You want to learn how semiconductor design works by running real simulations on real circuits that will ship in real products. You have studied CMOS fundamentals and digital logic, and you want to see how that knowledge applies to production-quality standard cell libraries.

You are looking for a structured learning experience alongside engineers who have spent years in characterization and library development. You want to build skills that matter, including transistor-level debugging, EDA tool fluency, automation scripting, and the discipline to document your work so others can build on it.

What You'll Be Doing

• Run transistor-level simulations on digital standard cells using industry-standard circuit simulators to extract timing, power, and leakage data across PVT corners.
• Analyze CMOS circuit behavior at the transistor level, reviewing schematics, debugging simulation failures, and identifying issues in logic implementation or device models.
• Support characterization and validation of standard cell libraries by running automated flows, reviewing results, and flagging anomalies or quality issues.
• Document simulation results, technical findings, and circuit-level observations in clear, structured reports that senior engineers can act on.
• Collaborate with library development engineers to improve characterization methods, refine automation scripts, and close gaps in coverage or accuracy.
• Learn and apply concepts from Liberty (.lib) format, Static Timing Analysis, and low-power design as you work through real library development cycles.
• Take part in technical reviews and team discussions to see how characterization fits into the wider semiconductor design and IP development process.

The Impact You Will Have

• You will contribute to production-quality standard cell libraries that power chip designs across automotive, mobile, AI, and data center applications.
• Your simulations and analysis will help catch timing, power, or functional issues before they reach customers.
• The characterization data you generate will support SoC designers as they meet performance, power, and area targets.
• Your debugging work will surface circuit-level insights that improve library quality and inform future design decisions.
• You will help build and refine automation flows that make characterization faster, more accurate, and more scalable across technology nodes.
• You will develop a strong foundation in semiconductor characterization and EDA tools for the next stage of your engineering career.

Key Program Facts

• Program length: 12 month apprenticeship program
• Location: Bengaluru, India
• Working model: 4-5 days in office
• Employment type: Full-time
• Start date: November/December 2026

Rewards and Benefits

Synopsys offers a comprehensive range of health, wellness, and financial benefits. Total rewards include both monetary and non-monetary offerings. Your recruiter will share more details about the salary range and benefits during the hiring process.